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| 型號： | A28F200BR-B |
| 廠商： | Intel Corp. |
| 英文描述： | 2-MBIT (256K x 8) Boot Block Flash Memory(2兆位 (128K x 16) 引導塊閃速存儲器) |
| 中文描述： | 2兆位（256K × 8）開機區(qū)塊快閃記憶體（2兆位（128K的× 16）引導塊閃速存儲器） |
| 文件頁數(shù)： | 14/36頁 |
| 文件大?。?/td> | 440K |
| 代理商： | A28F200BR-B |
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A28F200BR
E
14
ADVANCE INFORMATION
Table 6. Command Bus Definitions
Notes
First Bus Cycle
Second Bus Cycle
Command
8
Oper
Addr
Data
Oper
Addr
Data
Read Array
1
Write
X
FFH
Intelligent Identifier
2,4
Write
X
90H
Read
IA
IID
Read Status Register
3
Write
X
70H
Read
X
SRD
Clear Status Register
Write
X
50H
Word/Byte Program
6,7
Write
PA
40H
Write
PA
PD
Alternate Word/Byte
Program
6,7
Write
PA
10H
Write
PA
PD
Block Erase/Confirm
5
Write
BA
20H
Write
BA
D0H
Erase Suspend/Resume
Write
X
B0H
Write
X
D0H
ADDRESS
BA= Block Address
IA= Identifier Address
PA= Program Address
X= Don’t Care
DATA
SRD= Status Register Data
IID= Identifier Data
PD= Program Data
NOTES:
1.
Bus operations are defined in Tables 2 and 3.
2.
IA = Identifier Address: A
0
=0 for manufacturer code, A
0
=1 for device code.
3.
SRD - Data read from Status Register.
4.
IID = Intelligent Identifier Data. Following the Intelligent Identifier command, two Read operations access manufacturer and
device codes.
5.
BA = Address within the block being erased.
6.
PA = Address to be programmed. PD = Data to be programmed at location WD.
7.
Either 40H or 10H commands is valid.
8.
When writing commands to the device, the upper data bus [DQ
8
-DQ
15
] = X (28F200 only) which is either V
CC
or V
SS
, to
minimize current draw.
Program
The second write after the Program Setup
command, will latch addresses and data. Also, the
CUI initiates the WSM to begin execution of the
program algorithm. The device outputs Status
Register data when OE# is enabled. A Read Array
command is required after programming, to read
array data.
Erase Setup (20H)
Prepares the CUI for the Erase Confirm command.
No other action is taken. If the next command is not
an Erase Confirm command, then the CUI will set
both the Program Status and Erase Status bits of
the Status Register to a “1,” place the device into
the Read Status Register state, and wait for another
command.
相關PDF資料 |
PDF描述 |
|---|---|
| A28F200BR-T | 2-MBIT (128K x 16) Boot Block Flash Memory(2兆位 (128K x 16) 引導塊閃速存儲器) |
| A28F200BX-B | 2-MBIT (256K x 8) Boot Block Flash Memory(2兆位 (128K x 16) 引導塊閃速存儲器) |
| A28F400BR-B | 4-MBIT (512K x8) Boot Block Flash Memory(4兆位(512K x8) 引導塊閃速存儲器) |
| A28F400BR-T | 4-MBIT (256K x16) Boot Block Flash Memory(4兆位 (256K x16)引導塊閃速存儲器) |
| A28F400BX-B | 4-MBIT (512K x8) Boot Block Flash Memory(4兆位(512K x8) 引導塊閃速存儲器) |
相關代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| A28F200BR-T | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:2-MBIT (128K X 16. 256K X 8) SmartVoltage BOOT BLOCK FLASH MEMORY FAMILY |
| A28F200BR-T/B | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:A28F200BR-T/B |
| A28F200BR-TB | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:2-MBIT (128K X 16, 256K X 8) SmartVoltage BOOT BLOCK FLASH MEMORY FAMILY |
| A28F200BX-B | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:A28F200BX-B - 2-MBIT (128K x 16. 256K x 8) BOOT BLOCK FLASH MEMORY FAMILY |
| A28F200BX-T | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:2-MBIT (128K x 16, 256K x 8) BOOT BLOCK FLASH MEMORY FAMILY |
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