參數(shù)資料
型號(hào): A28F200BR-B
廠商: Intel Corp.
英文描述: 2-MBIT (256K x 8) Boot Block Flash Memory(2兆位 (128K x 16) 引導(dǎo)塊閃速存儲(chǔ)器)
中文描述: 2兆位(256K × 8)開機(jī)區(qū)塊快閃記憶體(2兆位(128K的× 16)引導(dǎo)塊閃速存儲(chǔ)器)
文件頁數(shù): 29/36頁
文件大小: 440K
代理商: A28F200BR-B
5.3
A28F200BR
29
ADVANCE INFORMATION
AC Characteristics
Table 12. AC Characteristics: Read Only Operations
(1)
(Automotive Temperature)
Symbol
Parameter
Note
Min
Max
Unit
t
AVAV
Read Cycle Time
80
ns
t
AVQV
Address to Output Delay
80
ns
t
ELQV
CE# to Output Delay
2
80
ns
t
PHQV
RP# to Output Delay
550
ns
t
GLQV
OE# to Output Delay
2
40
ns
t
ELQX
CE# to Output in Low Z
3
0
ns
t
EHQZ
CE# to Output in High Z
3
20
ns
t
GLQX
OE# to Output in Low Z
3
0
ns
t
GHQZ
OE# to Output in High Z
3
20
ns
t
OH
Output Hold from Address
CE#, or OE# Change
Whichever Occurs First
3
0
0
ns
t
ELFL
t
ELFH
CE# Low to BYTE High or Low
3
5
ns
t
AVFL
Address to BYTE# High or Low
3
5
ns
t
FLQV
t
FHQV
BYTE# to Output Delay
3,4
80
ns
t
FLQZ
BYTE# Low to Output in
High Z
3
30
ns
NOTES:
1.
2.
3.
4.
5.
See AC Input/Output Reference Waveform for timing measurements.
OE# may be delayed up to t
CE
- t
OE
after the falling edge of CE# without impact on t
CE
.
Sampled, but not 100% tested.
t
FLQV
, BYTE# switching low to valid output delay will be equal to t
AVQV
, measured from the time DQ
15
/A
-1
becomes valid.
See 5V Standard Test Configuration. (Figure 9)
相關(guān)PDF資料
PDF描述
A28F200BR-T 2-MBIT (128K x 16) Boot Block Flash Memory(2兆位 (128K x 16) 引導(dǎo)塊閃速存儲(chǔ)器)
A28F200BX-B 2-MBIT (256K x 8) Boot Block Flash Memory(2兆位 (128K x 16) 引導(dǎo)塊閃速存儲(chǔ)器)
A28F400BR-B 4-MBIT (512K x8) Boot Block Flash Memory(4兆位(512K x8) 引導(dǎo)塊閃速存儲(chǔ)器)
A28F400BR-T 4-MBIT (256K x16) Boot Block Flash Memory(4兆位 (256K x16)引導(dǎo)塊閃速存儲(chǔ)器)
A28F400BX-B 4-MBIT (512K x8) Boot Block Flash Memory(4兆位(512K x8) 引導(dǎo)塊閃速存儲(chǔ)器)
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