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參數(shù)資料
| 型號(hào)： | A54SX32A-CQG208C |
| 元件分類： | FPGA |
| 英文描述： | FPGA, 2880 CLBS, 32000 GATES, 206 MHz, CQFP208 |
| 封裝： | CERAMIC, QFP-208 |
| 文件頁數(shù)： | 2/40頁 |
| 文件大?。?/td> | 738K |
| 代理商： | A54SX32A-CQG208C |
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10
Bou ndar y S can T e s ti ng (BS T )
All SX-A devices are IEEE 1149.1 compliant. SX-A devices
offer superior diagnostic and testing capabilities by
providing Boundary Scan Testing (BST) and probing
capabilities. These functions are controlled through the
special test pins in conjunction with the program fuse. The
functionality of each pin is described in Table 2.
In the dedicated test mode, TCK, TDI, and TDO are
dedicated pins and cannot be used as regular I/Os. In
flexible mode, TMS should be set HIGH through a pull-up
resistor of 10k. TMS can be pulled LOW to initiate the test
sequence.
The program fuse determines whether the device is in
dedicated or flexible mode. The default (fuse not blown) is
flexible mode.
S X - A P rob e C i r cui t Co nt ro l P i ns
The Silicon Explorer II tool uses the boundary scan ports
(TDI, TCK, TMS, and TDO) to select the desired nets for
verification. The selected internal nets are assigned to the
PRA/PRB pins for observation. Figure 7 illustrates the
interconnection between Silicon Explorer II and the FPGA
to perform in-circuit verification. The TRST pin is equipped
with an internal pull-up resistor. To remove the boundary
scan state machine from the reset state during probing, it is
recommended that TRST be left floating.
D e s i gn Con s i der at i o n s
The TDI, TCK, TDO, PRA, and PRB pins should not be used
as input or bidirectional ports. Because these pins are active
during probing, critical signals input through these pins are
not available while probing. In addition, the Security Fuse
should not be programmed because doing so disables the
Probe Circuitry.
Table 2 Boundary Scan Pin Functionality
Program Fuse Blown
(Dedicated Test Mode)
Program Fuse Not Blown
(Flexible Mode)
TCK, TDI, TDO are
dedicated BST pins
TCK, TDI, TDO are flexible
and may be used as I/Os
No need for pull-up resistor
for TMS
Use a pull-up resistor of
10k on TMS
Figure 7 Probe Setup
Silicon Explorer II
TDI
TCK
TDO
TMS
PRA
PRB
Serial Connection
18
Channels
SX-A FPGA
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