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參數(shù)資料
| 型號： | ACE9030 |
| 廠商： | Mitel Networks Corporation |
| 英文描述： | Radio Interface and Twin Synthesiser |
| 中文描述： | 無線接口和雙合成器 |
| 文件頁數(shù)： | 6/39頁 |
| 文件大?。?/td> | 379K |
| 代理商： | ACE9030 |
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6
ACE9030
Parameter
Synthesiser charge pump current
Current setting resistor R
SMA
Current setting resistor R
SC
External capacitance on pin R
SMA
External capacitance on pin R
SC
Bias current I
RSMA
(nominally 1·25V / R
SMA
)
Bias current I
RSC
(nominally 1·25V / R
SC
)
Iprop(0) scaling accuracy, pin PDP
Iprop(1) scaling accuracy, pin PDP
Iint scaling accuracy, pin PDI
Icomp(0) scaling accuracy, pin PDP
Min.
Typ.
Max.
Unit
Conditions
19
19
39
39
78
78
5
5
35·2
35·2
+10
+10
+10
+10
k
k
pF
pF
μ
A
μ
A
%
%
%
%
Note 3
Note 3
Ensures stable
bias current.
R
SMA
= 39 k
R
SC
= 39 k
@ 200
μ
A. Note 4
@ 800
μ
A. Note 4
@ 4 mA. Note 4
@ ACC x 0·2
μ
A
Note 4
@ ACC x 0·8
μ
A
Note 4
@ ACC x 4
μ
A
Note 4
@ 256
μ
A. Note 4
Note 5
28·8
28·8
–10
–10
–10
–10
32
32
Icomp(1) scaling accuracy, pin PDP
–10
+10
%
Icomp(2) scaling accuracy, pin PDI
–10
+10
%
Iauxil scaling accuracy, pin PDA
Auxiliary Charge Pump,
Up or Down I
AUX
current variation
Main Charge Pumps,
Up or Down I
MAIN
or I
INTEGRAL
current variation
Iprop(0) or Iprop(1) setting from PDP pin
Iint setting from PDI pin
Icomp(0) or Icomp(1) setting from PDP pin
Icomp(2) setting from PDI pin
Iauxil setting from PDA pin
–5
–10
+5
+10
%
%
–10
+10
%
Note 6
1·0
5
12
180
512
mA
mA
μ
A
μ
A
μ
A
ELECTRICAL CHARACTERISTICS
These characteristics apply over these ranges of conditions (unless otherwise stated):
T
AMB
= – 40
°
C to + 85
°
C, V
DD
= + 3·6 to + 5·0 V, GND ref. = V
SS
D.C. Characteristics (continued)
Notes
3. The circuit is defined with resistors R
and R
connected from pins RSMA and RSC to V
but in most practical applications all V
SS
pins
will be connected to a ground plane so R
SMA
and R
SC
should then also be connected to this ground plane.
4. The charge pump currents are specified to this accuracy when the relevant output pin is at a potential of V
/2 and with R
= 39 k
, CN
= 200, L= 1, K = 5, R
= 19 k
.
The nominal value is set by external resistors and by programming registers, as defined in Table 6. Tolerances
in the internal Bandgap voltage and bias circuits are within the limits given for I
and I
, the scaling accuracy of the multiplying DAC’s
is within these limits given for Iprop(0), Iprop(1), Iint, Icomp(0), Icomp(1), Icomp(2), and auxil.
5. The Auxiliary charge pump output voltage is referred to as V
PDA
and the output current I
AUX
is the Up or Down current measured when
V
= V
/2.
The conditions for the variation limits for the Up current are:
either
I
AUX
= 128 or 256
μ
A
and
0 < V
PDA
< V
DD
– 0·5 V
or
I
= 512
μ
A
and
0 < V
< V
– 0·65 V
The conditions for the variation limits for the Down current are:
either
I
AUX
= 128 or 256
μ
A
and
0·5 V < V
PDA
< V
DD
or
I
AUX
= 512
μ
A
and
0·65 V < V
PDA
< V
DD
6. The Main charge pump output voltage at pin PDP is referred to as V
and at pin PDI as V
PDI.
The output currents I
MAIN
and I
INTEGRAL
are the
up or down current Iprop(0), Iprop(1) or Iint measured when V
PDP
or V
DPI
= V
DD
/2.
The conditions for the variation limits for the Up current are :
I
= 100 to 1000
μ
A or I
= 1 to 5 mA and 0 < V
PDP
< V
DD
– 0·45 V
The conditions for the variation limits for the Down current are:
I
MAIN
= 100 to 1000
μ
A or I
INTEGRAL
= 1 to 5 mA and 0·45 V < V
PDP
< V
DD
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|---|---|
| ACE9040 | Audio Processor Advance Information |
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| ACE9050 | System Controller and Data Modem Advance Information |
| ACFA-450 | AM CERAMIC FILTERS |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ACE9030IGFP1N | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Parallel-Input Frequency Synthesizer |
| ACE9030IGFP1R | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Parallel-Input Frequency Synthesizer |
| ACE9030IGFP2N | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Parallel-Input Frequency Synthesizer |
| ACE9030IGFP2R | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Parallel-Input Frequency Synthesizer |
| ACE9030M | 制造商:MITEL 制造商全稱:Mitel Networks Corporation 功能描述:Radio Interface and Twin Synthesiser |
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