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參數(shù)資料
| 型號： | AD5532ABCZ-2 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 3/20頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DAC 14BIT 32CH BIPO 74-CSPBGA |
| 產(chǎn)品培訓(xùn)模塊： | Data Converter Fundamentals DAC Architectures |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 設(shè)置時間： | 30µs |
| 位數(shù)： | 14 |
| 數(shù)據(jù)接口： | 串行 |
| 轉(zhuǎn)換器數(shù)目： | 34 |
| 電壓電源： | 模擬和數(shù)字 |
| 功率耗散（最大）： | 623mW |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 74-LBGA，CSPBGA |
| 供應(yīng)商設(shè)備封裝： | 74-CSPBGA（12x12） |
| 包裝： | 托盤 |
| 輸出數(shù)目和類型： | 32 電壓，單極 |
| 采樣率（每秒）： | 45k |
| 配用： | EVAL-AD5532HSEBZ-ND - BOARD EVAL FOR AD5532HS EVAL-AD5532EBZ-ND - BOARD EVAL FOR AD5532 |
AD5532
Rev. D | Page 11 of 20
TERMINOLOGY
DAC MODE
Integral Nonlinearity (INL)
This is a measure of the maximum deviation from a straight
line passing through the endpoints of the DAC transfer
function. It is expressed as a percentage of full-scale span.
Differential Nonlinearity (DNL)
This is the difference between the measured change and the
ideal 1 LSB change between any two adjacent codes. A specified
DNL of ±1 LSB maximum ensures monotonicity.
Offset
Offset is a measure of the output with all zeros loaded to the
DAC and OFFS_IN = 0. Because the DAC is lifted off the
ground by approximately 50 mV, this output is typically
mV
50
×
= Gain
V
OUT
Full-Scale Error
This is a measure of the output error with all 1s loaded to the
DAC. It is expressed as a percentage of full-scale range. See
Figure 8. It is calculated as
(
)
REFIN
Gain
Ideal
V
Error
Scale
Full
Scale
Full
OUT
×
=
)
(
where
2
5532
AD
for
7
5
/
3
/
1
5532
AD
for
52
.
3
=
=
Gain
Ideal
Gain
Ideal
Output Settling Time
This is the time taken from when the last data bit is clocked into
the DAC until the output has settled to within ±0.39%.
OFFS_IN Settling Time
The time taken from a 0 V to 3 V step change in input voltage
on OFFS_IN until the output has settled to within ±0.39%.
Digital-to-Analog Glitch Impulse
This is the area of the glitch injected into the analog output
when the code in the DAC register changes state. It is specified
as the area of the glitch in nV-secs when the digital code is
changed by 1 LSB at the major carry transition (011 . . . 11 to
100 . . . 00 or 100 . . . 00 to 011 . . . 11).
Digital Crosstalk
This is the glitch impulse transferred to the output of one DAC
at midscale while a full-scale code change (all 1s to all 0s and
vice versa) is written to another DAC. It is expressed in nV-secs.
Analog Crosstalk
This is the area of the glitch transferred to the output (VOUT) of
one DAC due to a full-scale change in the output (VOUT) of
another DAC. The area of the glitch is expressed in nV-secs.
Digital Feedthrough
This is a measure of the impulse injected into the analog
outputs from the digital control inputs when the part is not
being written to, i.e., CS/SYNC is high. It is specified in nV-secs
and is measured with a worst-case change on the digital input
pins, for example, from all 0s to all 1s and vice versa.
Output Noise Spectral Density
This is a measure of internally generated random noise.
Random noise is characterized as a spectral density (voltage per
root Hertz). It is measured by loading all DACs to midscale and
measuring noise at the output. It is measured in nV/(√Hz).
Output Temperature Coefficient
This is a measure of the change in analog output with changes
in temperature. It is expressed in ppm/°C.
DC Power-Supply Rejection Ratio (PSRR)
DC power-supply rejection ratio is a measure of the change in
analog output for a change in supply voltage (VDD and VSS). It is
expressed in dBs. VDD and VSS are varied ±5%.
DC Crosstalk
This is the DC change in the output level of one DAC at
midscale in response to a full-scale code change (all 0s to all 1s
and vice versa) and an output change of all other DACs. It is
expressed in μV.
ISHA MODE
VIN to VOUT Nonlinearity
The measure of the maximum deviation from a straight line
passing through the endpoints of the VIN versus VOUT transfer
function. It is expressed as a percentage of the full-scale span.
Offset Error
This is a measure of the output error when VIN = 70 mV. Ideally,
with VIN = 70 mV:
(
) (
)
(
)mV
1
70
_ IN
OFFS
OUT
V
Gain
V
×
×
=
Offset error is a measure of the difference between VOUT (actual)
and VOUT (ideal). It is expressed in mV and can be positive or
negative. See Figure 9.
Gain Error
This is a measure of the span error of the analog channel. It is
the deviation in slope of the transfer function expressed in mV.
See Figure 9. It is calculated as
Gain Error =
Actual Full-Scale Output Ideal Full-Scale Output Offset Error
where:
(
)
(
)
IN
OFFS
V
Gain
Output
Scale
Full
Ideal
_
1
96
.
2
×
×
=
AC Crosstalk
This is the area of the glitch that occurs on the output of one
channel while another channel is acquiring. It is expressed in
nV-secs.
Output Settling Time
This is the time taken from when BUSY goes high to when the
output has settled to ±0.018%.
Acquisition Time
This is the time taken for the VIN input to be acquired. It is the
length of time that BUSY stays low.
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參數(shù)描述 |
|---|---|
| AD5532ABCZ-3 | 功能描述:IC DAC 14BIT 32CH BIPO 74-CSPBGA RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:- 標(biāo)準(zhǔn)包裝:1 系列:- 設(shè)置時間:4.5µs 位數(shù):12 數(shù)據(jù)接口:串行，SPI? 轉(zhuǎn)換器數(shù)目:1 電壓電源:單電源 功率耗散（最大）:- 工作溫度:-40°C ~ 125°C 安裝類型:表面貼裝 封裝/外殼:8-SOIC（0.154"，3.90mm 寬） 供應(yīng)商設(shè)備封裝:8-SOICN 包裝:剪切帶 (CT) 輸出數(shù)目和類型:1 電壓，單極；1 電壓，雙極 采樣率（每秒）:* 其它名稱:MCP4921T-E/SNCTMCP4921T-E/SNRCTMCP4921T-E/SNRCT-ND |
| AD5532ABCZ-5 | 功能描述:IC DAC 14BIT 32CH BIPO 74-CSPBGA RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:1,000 系列:- 設(shè)置時間:1µs 位數(shù):8 數(shù)據(jù)接口:串行 轉(zhuǎn)換器數(shù)目:8 電壓電源:雙 ± 功率耗散（最大）:941mW 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:24-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:24-SOIC W 包裝:帶卷 (TR) 輸出數(shù)目和類型:8 電壓，單極 采樣率（每秒）:* |
| AD5532B | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:AD5532B: 32-Channel. 14-Bit DAC with Precision Infinite Sample-and-Hold Mode (Rev A. 9/02) |
| AD5532BBC-1 | 制造商:Analog Devices 功能描述:DAC 32-CH 14-bit 74-Pin CSP-BGA Tray 制造商:Rochester Electronics LLC 功能描述:32 CHANNEL, 14-BIT DAC & SHA I.C. - Bulk 制造商:Analog Devices 功能描述:Digital-Analog Converter IC Interface Ty |
| AD5532BBCZ-1 | 功能描述:IC DAC 14BIT 32CH BIPO 74-CSPBGA RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:- 標(biāo)準(zhǔn)包裝:1 系列:- 設(shè)置時間:4.5µs 位數(shù):12 數(shù)據(jù)接口:串行，SPI? 轉(zhuǎn)換器數(shù)目:1 電壓電源:單電源 功率耗散（最大）:- 工作溫度:-40°C ~ 125°C 安裝類型:表面貼裝 封裝/外殼:8-SOIC（0.154"，3.90mm 寬） 供應(yīng)商設(shè)備封裝:8-SOICN 包裝:剪切帶 (CT) 輸出數(shù)目和類型:1 電壓，單極；1 電壓，雙極 采樣率（每秒）:* 其它名稱:MCP4921T-E/SNCTMCP4921T-E/SNRCTMCP4921T-E/SNRCT-ND |
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