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參數(shù)資料
| 型號： | AD7835ASZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 7/28頁 |
| 文件大小： | 0K |
| 描述： | IC DAC 14BIT QUAD PARA 44-MQFP |
| 產(chǎn)品培訓(xùn)模塊： | Data Converter Fundamentals DAC Architectures |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 設(shè)置時(shí)間： | 10µs |
| 位數(shù)： | 14 |
| 數(shù)據(jù)接口： | 并聯(lián) |
| 轉(zhuǎn)換器數(shù)目： | 4 |
| 電壓電源： | 模擬和數(shù)字，雙 ± |
| 功率耗散（最大）： | 465mW |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 44-QFP |
| 供應(yīng)商設(shè)備封裝： | 44-MQFP（10x10） |
| 包裝： | 托盤 |
| 輸出數(shù)目和類型： | 4 電壓，單極；4 電壓，雙極 |
| 采樣率（每秒）： | 100k |
| 產(chǎn)品目錄頁面： | 785 (CN2011-ZH PDF) |
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AD7834/AD7835
Rev. D | Page 15 of 28
D23 D22 D21 D20 D19 D18 D17 D16 D15 D14 D13 D12 D11 D10 D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
NOTE: D23 IS THE FIRST BIT TRANSMITTED IN THE SERIAL WORD.
CONTROL BIT TO USE/IGNORE
FOLLOWING 23 BITS OF INFORMATION
CHANNEL ADDRESS MSB, D1
CHANNEL ADDRESS LSB, D2
PACKAGE ADDRESS MSB, PA4
PACKAGE ADDRESS, PA3
PACKAGE ADDRESS, PA2
PACKAGE ADDRESS, PA1
PACKAGE ADDRESS LSB, PA0
LSB, DB0
SECOND LSB, DB1
THIRD LSB, DB2
DB3
DB4
DB5
DB6
DB7
DB8
DB9
DB10
THIRD MSB, DB11
SECOND MSB, DB12
MSB, DB13
SECOND LEADING ZERO
FIRST LEADING ZERO
01006-
018
Figure 18. Bit Assignments for 24-Bit Data Stream of AD7834
When 14-bit transfers are being used, the DAC output voltages,
VOUT1 to VOUT4, can be updated to reflect new data in the DAC
input registers in one of two ways. The first method normally
keeps LDAC high and only pulses LDAC low momentarily to
update all DAC latches simultaneously with the contents of
their respective input registers. The second method ties LDAC
low, and channel updating occurs on a per channel basis after
new data is loaded to an input register.
To avoid the DAC output going to an intermediate value during
a 2-byte transfer, LDAC should not be tied low permanently but
should be held high until the two bytes are written to the input
register. When the selected input register has been loaded with
the two bytes, LDAC should then be pulsed low to update the
DAC latch and, consequently, perform the digital-to-analog
conversion.
In many applications, it may be acceptable to allow the DAC
output to go to an intermediate value during a 2-byte transfer.
In such applications, LDAC can be tied low, thus using one less
control line.
The actual DAC input register that is being written to is deter-
mined by the logic levels present on the device address lines, as
shown in Table 11.
Table 11. AD7835—Address Line Truth Table
A2
A1
A0
DAC Selected
0
DAC 1
0
1
DAC 2
0
1
0
DAC 3
0
1
DAC 4
1
X
All DACs selected
UNIPOLAR CONFIGURATION
Figure 19 shows the AD7834/AD7835 in the unipolar binary
circuit configuration. The VREF(+) input of the DAC is driven by
the
gives the code table for unipolar operation of the AD7834/
AD7835.
+15V
+5V
VOUT
(0V TO 5V)
VCC
2
6
8
5
4
SIGNAL
GND
C1
1nF
AGND
DGND
VDD
VOUT
VREF(+)
VREF(–)
VSS
–15V
1ADDITIONAL PINS OMITTED FOR CLARITY
R1
10k
Ω
AD7834/
AD78351
AD586
SIGNAL
GND
01006-019
Figure 19. Unipolar 5 V Operation
Offset and gain can be adjusted in Figure 19 as follows:
To adjust offset, disconnect the VREF() input from 0 V,
load the DAC with all 0s, and adjust the VREF() voltage
until VOUT = 0 V.
To adjust gain, load the AD7834/AD7835 with all 1s and
adjust R1 until VOUT = 5 V(16383/16384) = 4.999695 V.
Many circuits do not require these offset and gain adjustments.
In these circuits, R1 can be omitted. Pin 5 of the AD586 can be
left open circuit, and Pin 2 (VREF()) of the AD7834/AD7835 is
tied to 0 V.
Binary Number in DAC Latch
MSB
LSB
Analog Output (VOUT)
VREF (16383/16384) V
11
1111
VREF (8192/16384) V
10
0000
VREF (8191/16384) V
01
1111
00
0000
0001
VREF (1/16384) V
00
0000
0 V
1 VREF = VREF(+); VREF() = 0 V for unipolar operation.
2 For VREF(+) = 5 V, 1 LSB = 5 V/214 = 5 V/16384 = 305 μV.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD7835ASZ | 制造商:Analog Devices 功能描述:IC 14-BIT DAC |
| AD7835ASZ-REEL | 功能描述:IC DAC 14BIT QUAD PARA 44-MQFP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:- 產(chǎn)品培訓(xùn)模塊:Data Converter Fundamentals DAC Architectures 標(biāo)準(zhǔn)包裝:750 系列:- 設(shè)置時(shí)間:7µs 位數(shù):16 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:1 電壓電源:雙 ± 功率耗散（最大）:100mW 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:28-LCC（J 形引線） 供應(yīng)商設(shè)備封裝:28-PLCC（11.51x11.51） 包裝:帶卷 (TR) 輸出數(shù)目和類型:1 電壓，單極；1 電壓，雙極 采樣率（每秒）:143k |
| AD7835BS | 制造商:AD 制造商全稱:Analog Devices 功能描述:LC2MOS Quad 14-Bit DAC |
| AD7836 | 制造商:AD 制造商全稱:Analog Devices 功能描述:LC2MOS Quad 14-Bit DAC |
| AD7836AS | 制造商:Analog Devices 功能描述:DAC 4-CH R-2R 14-bit 44-Pin MQFP 制造商:Analog Devices 功能描述:IC 14-BIT DAC |
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