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參數(shù)資料
| 型號(hào)： | AD8310ARMZ-REEL7 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 11/24頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC AMP LOGARITHMIC 8MSOP |
| 標(biāo)準(zhǔn)包裝： | 1,000 |
| 類型： | 對數(shù)放大器 |
| 應(yīng)用： | 接收器信號(hào)強(qiáng)度指示（RSSI） |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 8-TSSOP，8-MSOP（0.118"，3.00mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 8-MSOP |
| 包裝： | 帶卷 (TR) |
AD8310
Rev. F | Page 19 of 24
APPLICATIONS INFORMATION
The AD8310 is highly versatile and easy to use. It needs only a
few external components, most of which can be immediately
accommodated using the simple connections shown in the
Using the AD8310 section.
A few examples of more specialized applications are provided
in the following sections. See the AD8307 data sheet for more
applications (note the slightly different pin configuration).
CABLE-DRIVING
For a supply voltage of 3 V or greater, the AD8310 can drive a
grounded 100 Ω load to 2.5 V. If reverse-termination is required
when driving a 50 Ω cable, it should be included in series with
the output, as shown in Figure 37. The slope at the load is then
12 mV/dB. In some cases, it might be permissible to operate the
cable without a termination at the far end, in which case the
slope is not lowered. Where a further increase in slope is
desirable, the scheme shown in Figure 34 can be used.
AD8310
VOUT
50
Ω
50
Ω
01084-037
Figure 37. Output Response of Cable-Driver Application
DC-COUPLED INPUT
It might occasionally be necessary to provide response to dc
inputs. Because the AD8310 is internally dc-coupled, there is no
reason why this cannot be done. However, its differential inputs
must be positioned at least 2 V above the COM potential for
proper biasing of the first stage. Usually, the source is a single-
sided ground-referenced signal, so level-shifting and a single-
ended-to-differential conversion must be provided to correctly
drive the AD8310’s inputs.
Figure 38 shows how a level-shift to midsupply (2.5 V in this
example) and a single-ended-to-differential conversion can be
accomplished using the AD8138 differential amplifier. The four
499 Ω resistors set up a gain of unity. An output common-mode
(or bias) voltage of 2.5 is achieved by applying 2.5 V from a supply-
differential outputs of the AD8138 directly drive the 1.1 kΩ
input impedance of the AD8310.
5V
0.01 F
μ
SIGNAL
INPUT
AD8138
0.1
μF
5V
499
Ω
499
Ω
499
Ω
499
Ω
10k
Ω
0.1
μF
5V
10k
Ω
NC
INHI ENBL BFIN VPOS
INLO COMM OFLT VOUT
AD8310
12
34
87
65
VOUT
5V
3.01k
Ω
1.87k
Ω
50
Ω
2.5V
NC = NO CONNECT
01084-
038
Figure 38. DC-Coupled Log Amp
In this application the offset voltage of the AD8138 must be
trimmed. The internal offset compensation circuitry of the
AD8310 is disabled by applying a nominal voltage of ~1.9 V to
the OFLT pin, so the trim on the AD8138 is effectively trimming
the offsets of both devices. The trim is done by grounding the
circuit’s input and slightly varying the gain resistors on the
inverting input of the AD8138 (a 50 Ω potentiometer is used in
this example) until the voltage on the AD8310’s output reaches
a minimum.
After trimming, the lower end of the dynamic range is limited
by the broadband noise at the output of the AD8138, which is
approximately 425 μV p-p. A differential low-pass filter can be
added between the AD8138 and the AD8310 when the very fast
pulse response of the circuit is not required.
INPUT LEVEL (mV)
0.1
R
SSI
OU
TPU
T
(
V
)
1
0.7
0.9
1.1
1.3
1.5
1.7
1.9
2.1
10
100
1000
2.3
2.5
2.7
01084-039
Figure 39. Transfer Function of DC-Coupled Log Amp Application
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