參數(shù)資料
型號： AD9257BCPZRL7-65
廠商： Analog Devices Inc
文件頁數(shù)： 26/40頁
文件大?。?/td> 0K
描述： IC ADC 14BIT SRL 65MSPS 64LFCSP
標(biāo)準(zhǔn)包裝： 750
位數(shù)： 14
采樣率（每秒）： 65M
數(shù)據(jù)接口： 串行，SPI?
轉(zhuǎn)換器數(shù)目： 8
功率耗散（最大）： 547mW
電壓電源： 模擬和數(shù)字
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 64-VFQFN 裸露焊盤，CSP
供應(yīng)商設(shè)備封裝： 64-LFCSP-VQ（9x9）
包裝： 帶卷 (TR)
輸入數(shù)目和類型： 8 個差分
AD9257
Data Sheet
Rev. A | Page 32 of 40
Reg.
Addr.
(Hex)
Register Name
Bit 7
(MSB)
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0 (LSB)
Default
Value
(Hex)
Comments
0x0B
Clock divide
(global)
Open
Clock divide ratio, Bits[2:0]
000 = divide by 1
001 = divide by 2
010 = divide by 3
011 = divide by 4
100 = divide by 5
101 = divide by 6
110 = divide by 7
111 = divide by 8
0x00
The divide
ratio is the
value plus 1.
0x0C
Enhancement
control
Open
Chop
mode
0 = off
1 = on
Open
0x00
Enables/
disables chop
mode.
0x0D
Test mode (local
except for PN
sequence resets)
User input test mode
00 = single
01 = alternate
10 = single once
11 = alternate once
(affects user input test
mode only,
Bits[3:0] = 1000)
Reset PN
long gen
Reset
PN
short
gen
Output test mode, Bits[3:0] (local)
0000 = off (default)
0001 = midscale short
0010 = positive FS
0011 = negative FS
0100 = alternating checkerboard
0101 = PN 23 sequence
0110 = PN 9 sequence
0111 = one/zero word toggle
1000 = user input
1001 = 1-/0-bit toggle
1010 = 1× sync
1011 = one bit high
1100 = mixed bit frequency
0x00
When set, the
test data is
placed on the
output pins in
place of
normal data.
0x10
Offset adjust (local)
8-bit device offset adjustment, Bits[7:0] (local)
Offset adjust in LSBs from +127 to 128 (twos complement format)
0x00
Device offset
trim.
0x14
Output mode
Open
LVDS-ANSI/
LVDS-IEEE
option
0 = LVDS-
ANSI
1 = LVDS-
IEEE reduced
range link
(global);
Open
Output
invert
(local)
Open
Output
format
0 = offset
binary
1 = twos
comple-
ment
(global)
0x01
Configures the
outputs and
the format of
the data.
0x15
Output adjust
Open
Output driver
termination,
Bits[1:0]
00 = none
01 = 200
10 = 100
11 = 100
Open
Output
drive
0 = 1×
drive
1 = 2×
drive
0x00
Determines
LVDS or
other output
properties.
0x16
Output phase
Open
Input clock phase adjust, Bits[6:4]
(value is number of input clock cycles
of phase delay)
Output clock phase adjust, Bits[3:0]
(Setting = 0000 through 1011)
0x03
On devices
that use global
clock divide,
determines
which phase
of the divider
output is used
to supply the
output clock.
Internal
latching is
unaffected.
0x18
VREF
Open
Internal VREF adjustment
digital scheme, Bits[2:0]
000 = 1.0 V p-p
001 = 1.14 V p-p
010 = 1.33 V p-p
011 = 1.6 V p-p
100 = 2.0 V p-p
0x04
Selects and/or
adjusts the
VREF.
相關(guān)PDF資料
PDF描述
IDT7285L12PA8 IC FIFO 4096X18 12NS 56TSSOP
LTC1349IG IC TXRX 5V RS232 LOW PWR 28-SSOP
VI-BTY-MY CONVERTER MOD DC/DC 3.3V 33W
IDT72245LB10PF IC FIFO 1024X18 SYNC 10NS 64QFP
LTC1349IG#PBF IC TXRX 5V RS232 LOW PWR 28-SSOP
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
AD9257TCPZ-65-EP 功能描述:14 Bit Analog to Digital Converter 8 Input 8 Pipelined 64-LFCSP-WQ (9x9) 制造商:analog devices inc. 系列:- 包裝:托盤 零件狀態(tài):有效 位數(shù):14 采樣率（每秒）:65M 輸入數(shù):8 輸入類型:差分 數(shù)據(jù)接口:LVDS - 串行 配置:S/H-ADC 無線電 - S/H:ADC:1:1 A/D 轉(zhuǎn)換器數(shù):8 架構(gòu):管線 參考類型:內(nèi)部 電壓 - 電源，模擬:1.7 V ~ 1.9 V 電壓 - 電源，數(shù)字:1.7 V ~ 1.9 V 特性:同步采樣 工作溫度:-55°C ~ 125°C 封裝/外殼:64-WFQFN 裸露焊盤 供應(yīng)商器件封裝:64-LFCSP-WQ（9x9） 標(biāo)準(zhǔn)包裝:1
AD9258 制造商:AD 制造商全稱:Analog Devices 功能描述:14-Bit, 80 MSPS/105 MSPS/125 MSPS, 1.8 V Dual Analog-to-Digital Converter (ADC)
AD9258-105EBZ1 制造商:AD 制造商全稱:Analog Devices 功能描述:14-Bit, 80 MSPS/105 MSPS/125 MSPS, 1.8 V Dual Analog-to-Digital Converter (ADC)
AD9258-125EBZ1 制造商:AD 制造商全稱:Analog Devices 功能描述:14-Bit, 80 MSPS/105 MSPS/125 MSPS, 1.8 V Dual Analog-to-Digital Converter (ADC)
AD9258-80EBZ 制造商:Analog Devices 功能描述:EVALUATION BOARD - Boxed Product (Development Kits)
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺，查看報價

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺，查看報價

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*