參數(shù)資料
型號(hào): AD9511BCPZ
廠商: Analog Devices Inc
文件頁數(shù): 43/60頁
文件大小: 0K
描述: IC CLOCK DIST 5OUT PLL 48LFCSP
標(biāo)準(zhǔn)包裝: 1
類型: 扇出緩沖器(分配),除法器
PLL:
輸入: 時(shí)鐘
輸出: CMOS,LVDS,LVPECL
電路數(shù): 1
比率 - 輸入:輸出: 2:5
差分 - 輸入:輸出: 是/是
頻率 - 最大: 1.2GHz
除法器/乘法器: 是/無
電源電壓: 3.135 V ~ 3.465 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 48-VFQFN 裸露焊盤,CSP
供應(yīng)商設(shè)備封裝: 48-LFCSP-VQ(7x7)
包裝: 托盤
產(chǎn)品目錄頁面: 776 (CN2011-ZH PDF)
AD9511
Rev. A | Page 48 of 60
Reg.
Addr.
(Hex)
Bit(s) Name
Description
08
<5:2> PLL Mux Control
<5>
<4>
<3>
<2>
MUXOUT—Signal on STATUS Pin
0
Off (Signal Goes Low) (Default)
0
1
Digital Lock Detect (Active High)
0
1
0
N Divider Output
0
1
Digital Lock Detect (Active Low)
0
1
0
R Divider Output
0
1
0
1
Analog Lock Detect (N Channel, Open-Drain)
0
1
0
A Counter Output
0
1
Prescaler Output (NCLK)
1
0
PFD Up Pulse
1
0
1
PFD Down Pulse
1
0
1
0
Loss-of-Reference (Active High)
1
0
1
Tri-State
1
0
Analog Lock Detect (P Channel, Open-Drain)
1
0
1
Loss-of-Reference or Loss-of-Lock (Inverse of DLD)
(Active High)
1
0
Loss-of-Reference or Loss-of-Lock (Inverse of DLD)
(Active Low)
1
Loss-of-Reference (Active Low)
MUXOUT is the PLL portion of the STATUS output MUX.
08
<6>
Phase-Frequency
Detector (PFD)
Polarity
0 = Negative (Default), 1 = Positive.
08
<7>
Not Used.
09
<0>
Reset All Counters 0 = Normal (Default), 1 = Reset R, A, and B Counters.
09
<1>
N-Counter Reset
0 = Normal (Default), 1 = Reset A and B Counters.
09
<2>
R-Counter Reset
0 = Normal (Default), 1 = Reset R Counter.
09
<3>
Not Used.
09
<6:4> Charge Pump (CP)
Current Setting
<6>
<5>
<4>
ICP (mA)
0
0.60
0
1
1.2
0
1
0
1.8
0
1
2.4
1
0
3.0
1
0
1
3.6
1
0
4.2
1
4.8
Default = 000b.
These currents assume: CPRSET = 5.1 kΩ.
Actual current can be calculated by: CP_lsb = 3.06/CPRSET.
09
<7>
Not Used.
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