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參數(shù)資料
| 型號： | AD9540/PCBZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 13/32頁 |
| 文件大?。?/td> | 0K |
| 描述： | BOARD EVAL CLK GEN SYNTH 48LFCSP |
| 設計資源： | AD9540 Eval Brd Schematics AD9540 Eval Brd BOM AD9540 Gerber Files |
| 標準包裝： | 1 |
| 主要目的： | 計時，時鐘發(fā)生器 |
| 已用 IC / 零件： | AD9540 |
| 已供物品： | 板 |
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AD9540
Rev. A | Page 20 of 32
DDS AND DAC
Finally, the amplitude words are piped to a 10-bit DAC. Because
the DAC is a sampled data system, the output is a reconstructed
sine wave that needs to be filtered to take high frequency images
out of the spectrum. The DAC is a current steering DAC that is
AVDD referenced. To get a measurable voltage output, the DAC
outputs must be terminated through a load resistor to AVDD,
typically 50 . At positive full scale, IOUT sinks no current and
the voltage drop across the load resistor is 0. However, the IOUT
output sinks the programmed full-scale output current of the
DAC, causing the maximum output voltage drop across the load
resistor. At negative full-scale, the situation is reversed and IOUT
sinks the full-scale current (and generates the maximum drop
across the load resistor), while IOUT sinks no current (and
generates no voltage drop). At midscale, the outputs sink equal
amounts of current, generating equal voltage drops.
The precision frequency division within the device is
accomplished using DDS technology. The DDS can control the
digital phase relationships by clocking a 48-bit accumulator.
The incremental value loaded into the accumulator, known as
the frequency tuning word, controls the overflow rate of the
accumulator. Similar to a sine wave completing a 2π radian
revolution, the overflow of the accumulator is cyclical in nature
and generates a fundamental frequency according to
48
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o
f
FTW
f
×
=
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2
W
{0
47
≤
≤ FT
The instantaneous phase of the sine wave is therefore the output
of the phase accumulator block. This signal can be phase-offset
by programming an additive digital phase that is added to each
phase sample coming out of the accumulator.
These instantaneous phase values are then piped through a
phase-to-amplitude conversion (sometimes called an angle-to-
amplitude conversion or AAC) block. This algorithm follows a
COS(x) relationship, where x is the phase coming out of the
phase offset block, normalized to 2π.
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| AD9540-VCO/PCB | 制造商:Analog Devices 功能描述:EVAL BD FOR AD9540 ,655 MHZ LOW JITTER CLOCK GEN - Trays |
| AD9540-VCO/PCBZ | 功能描述:BOARD EVAL CLK GEN SYNTH 48LFCSP RoHS:是 類別:編程器，開發(fā)系統(tǒng) >> 評估演示板和套件 系列:- 標準包裝:1 系列:- 主要目的:電信，線路接口單元（LIU） 嵌入式:- 已用 IC / 零件:IDT82V2081 主要屬性:T1/J1/E1 LIU 次要屬性:- 已供物品:板，電源，線纜，CD 其它名稱:82EBV2081 |
| AD9542/PCBZ | |
| AD9542BCPZ | 功能描述:SYNCHRONIZER & ADAPTIVE CLOCK TR 制造商:analog devices inc. 系列:* 包裝:托盤 零件狀態(tài):在售 安裝類型:表面貼裝 封裝/外殼:64-WFQFN 裸露焊盤 供應商器件封裝:64-LFCSP（9x9） 標準包裝:1 |
| AD9542BCPZ-REEL7 | 功能描述:SYNCHRONIZER & ADAPTIVE CLOCK TR 制造商:analog devices inc. 系列:* 包裝:帶卷（TR） 零件狀態(tài):在售 安裝類型:表面貼裝 封裝/外殼:64-WFQFN 裸露焊盤 供應商器件封裝:64-LFCSP（9x9） 標準包裝:750 |
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