參數(shù)資料
型號： AD9548/PCBZ
廠商： Analog Devices Inc
文件頁數(shù)： 8/112頁
文件大?。?/td> 0K
描述： BOARD EVAL FOR AD9548
產(chǎn)品變化通告： AD9548 Mask Change 20/Oct/2010
設計資源： AD9548 Schematic
AD9548 BOM
AD9548 Eval Brd Layers
標準包裝： 1
主要目的： 計時，時鐘發(fā)生器
嵌入式： 否
已用 IC / 零件： AD9548
主要屬性： 62.5 ~ 450 MHz 輸出頻率
次要屬性： SPI 和 I2C 兼容控制端口
已供物品： 板
Data Sheet
AD9548
Rev. E | Page 105 of 112
Table 151. EEPROM Storage Sequence for Profile 4 and Profile 5 Settings
Address
Bits
Bit Name
Description
0x0E28
[7:0]
Profile 4 and Profile 5
The default value of this register is 0x63, which the controller interprets as a data
instruction. Its decimal value is 99, which this tells the controller to transfer 100
bytes of data (99 + 1) beginning at the address specified by the next two bytes. The
controller stores 0x63 in the EEPROM and increments the EEPROM address pointer.
0x0E29
[7:0]
Profile 4 and Profile 5
The default value of these two registers is 0x0700. Note that Register 0x0E29 and
Register 0x0E2A are the most significant and least significant bytes of the target
address, respectively. Because the previous register contains a data instruction,
these two registers define a starting address (in this case, 0x0700). The controller
stores 0x0700 in the EEPROM and increments the EEPROM pointer by 2. It then
transfers 100 bytes from the register map (beginning at Address 0x0700) to the
EEPROM and increments the EEPROM address pointer by 101 (100 data bytes and
one checksum byte). The 99 bytes transferred correspond to the Profile 4 and
Profile 5 parameters in the register map.
0x0E2A
[7:0]
Table 152. EEPROM Storage Sequence for Profile 6 and Profile 7 Settings
Address
Bits
Bit Name
Description
0x0E2B
[7:0]
Profile 6 and Profile 7
The default value of this register is 0x63, which the controller interprets as a data
instruction. Its decimal value is 99, which this tells the controller to transfer 100
bytes of data (99 + 1) beginning at the address specified by the next two bytes. The
controller stores 0x63 in the EEPROM and increments the EEPROM address pointer.
0x0E2C
[7:0]
Profile 6 and Profile 7
The default value of these two registers is 0x0780. Note that Register 0x0E2C and
Register 0x0E2C are the most significant and least significant bytes of the target
address, respectively. Because the previous register contains a data instruction,
these two registers define a starting address (in this case, 0x0780). The controller
stores 0x0780 in the EEPROM and increments the EEPROM pointer by 2. It then
transfers 100 bytes from the register map (beginning at Address 0x0780) to the
EEPROM and increments the EEPROM address pointer by 101 (100 data bytes and
one checksum byte). The 99 bytes transferred correspond to the Profile 6 and
Profile 7 parameters in the register map.
0x0E2D
[7:0]
0x0E2E
[7:0]
I/O update
The default value of this register is 0x80, which the controller interprets as an I/O
update instruction. The controller stores 0x80 in the EEPROM and increments the
EEPROM address pointer.
Table 153. EEPROM Storage Sequence for Operational Control Settings
Address
Bits
Bit Name
Description
0x0E2F
[7:0]
Operational controls
The default value of this register is 0x10, which the controller interprets as a data
instruction. Its decimal value is 16, this tells the controller to transfer 17 bytes of
data (16 + 1) beginning at the address specified by the next two bytes. The
controller stores 0x10 in the EEPROM and increments the EEPROM address pointer.
0x0E30
[7:0]
Operational controls
The default value of these two registers is 0x0A00. Note that Register 0x0E30 and
Register 0x0E31 are the most significant and least significant bytes of the target
address, respectively. Because the previous register contains a data instruction,
these two registers define a starting address (in this case, 0x0A00). The controller
stores 0x0A00 in the EEPROM and increments the EEPROM pointer by 2. It then
transfers 17 bytes from the register map (beginning at Address 0x0A00) to the
EEPROM and increments the EEPROM address pointer by 18 (17 data bytes and one
checksum byte). The 17 bytes transferred correspond to the operational controls
parameters in the register map.
0x0E31
[7:0]
0x0E32
[7:0]
I/O update
The default value of this register is 0x80, which the controller interprets as an I/O
update instruction. The controller stores 0x80 in the EEPROM and increments the
EEPROM address pointer.
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