參數(shù)資料
型號(hào): AD9641-155KITZ
廠商: Analog Devices Inc
文件頁數(shù): 35/36頁
文件大?。?/td> 0K
描述: KIT EVAL FOR AD9641
設(shè)計(jì)資源: AD9641 Gerber Files
標(biāo)準(zhǔn)包裝: 1
系列: *
AD9641
Data Sheet
Rev. B | Page 8 of 36
ABSOLUTE MAXIMUM RATINGS
Table 6.
Parameter
Rating
ELECTRICAL
AVDD to AGND
0.3 V to +2.0 V
DRVDD to AGND
0.3 V to +2.0V
VIN+, VIN to AGND
0.3 V to AVDD + 0.2 V
CLK+, CLK to AGND
0.3 V to AVDD + 0.2 V
SYNC to AGND
0.3 V to AVDD + 0.2 V
VCM to AGND
0.3 V to AVDD + 0.2 V
CSB to AGND
0.3 V to DRVDD + 0.2 V
SCLK to AGND
0.3 V to DRVDD + 0.2 V
SDIO to AGND
0.3 V to DRVDD + 0.2 V
PDWN to AGND
0.3 V to DRVDD + 0.2 V
DOUT+, DOUT to AGND
0.3 V to DRVDD + 0.2 V
DSYNC+, DSYNC to AGND
0.3 V to DRVDD + 0.2 V
ENVIRONMENTAL
Operating Temperature Range
(Ambient)
40°C to +85°C
Maximum Junction Temperature
Under Bias
150°C
Storage Temperature Range
(Ambient)
65°C to +150°C
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
THERMAL CHARACTERISTICS
The exposed paddle must be soldered to the ground plane for
the LFCSP package. Soldering the exposed paddle to the PCB
increases the reliability of the solder joints and maximizes the
thermal capability of the package.
Table 7. Thermal Resistance
Package Type
Airflow
Velocity
(m/sec)
θJA1,2
θJC1,3
θJB1,4
Unit
32-Lead LFCSP
5 mm × 5 mm
(CP-32-12)
0
36
3
20
°C/W
1.0
32
°C/W
2.5
28
°C/W
1 Per JEDEC 51-7, plus JEDEC 51-5 2S2P test board.
2 Per JEDEC JESD51-2 (still air) or JEDEC JESD51-6 (moving air).
3 Per MIL-Std 883, Method 1012.1.
4 Per JEDEC JESD51-8 (still air).
Typical θJA is specified for a 4-layer PCB with a solid ground
plane. As shown in Table 7, airflow improves heat dissipation,
which reduces θJA. In addition, metal in direct contact with the
package leads from metal traces, through holes, ground, and
power planes, reduces θJA.
ESD CAUTION
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