- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄16440 > AD9912A/PCBZ (Analog Devices Inc)BOARD EVALUATION FOR AD9912 PDF資料下載
參數(shù)資料
| 型號： | AD9912A/PCBZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 29/40頁 |
| 文件大?。?/td> | 0K |
| 描述： | BOARD EVALUATION FOR AD9912 |
| 產(chǎn)品培訓(xùn)模塊： | Direct Digital Synthesis Tutorial Series (1 of 7): Introduction Direct Digital Synthesizer Tutorial Series (7 of 7): DDS in Action Direct Digital Synthesis Tutorial Series (3 of 7): Angle to Amplitude Converter Direct Digital Synthesis Tutorial Series (6 of 7): SINC Envelope Correction Direct Digital Synthesis Tutorial Series (4 of 7): Digital-to-Analog Converter Direct Digital Synthesis Tutorial Series (2 of 7): The Accumulator |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 主要目的： | 計(jì)時，直接數(shù)字合成（DDS） |
| 嵌入式： | 否 |
| 已用 IC / 零件： | AD9912 |
| 主要屬性： | 14 位數(shù)模轉(zhuǎn)換器，48 位調(diào)節(jié)字寬 |
| 次要屬性： | 1GHz 圖形用戶界面 |
| 已供物品： | 板 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁當(dāng)前第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁
AD9912
Rev. F | Page 35 of 40
CMOS OUTPUT DIVIDER (S-DIVIDER) (REGISTER 0x0100 TO REGISTER 0x0106)
Register 0x0100 to Register 0x0103—Reserved
Register 0x0104—S-Divider
Table 21.
Bits
Bit Name
Description
[7:0]
S-divider
CMOS output divider. Divide ratio = 1 65,536. If the desired S-divider setting is greater than 65,536,
or if the signal on FDBK_IN is greater than 400 MHz, then Bit 0 in Register 0x0106 must be set. Note that
the actual S-divider is the value in this register plus 1; so to have an S-divider of 1, Register 0x0104 and
Register 0x0105 must both be 0x00. Register 0x0104 is the least significant byte.
Register 0x0105—S-Divider (Continued)
Table 22.
Bits
Bit Name
Description
[15:8]
S-divider
CMOS output divider. Divide ratio = 1 65,536. If the desired S-divider setting is greater than 65,536,
or if the signal on FDBK_IN is greater than 400 MHz, then Bit 0 in Register 0x0106 must be set. Note that
the actual S-divider is the value in this register plus 1; so to have an S-divider of 1, Register 0x0104 and
Register 0x0105 must both be 0x00. Register 0x104 is the least significant byte.
Register 0x0106—S-Divider (Continued)
Table 23.
Bits
Bit Name
Description
7
Falling edge triggered
Setting this bit inverts the reference clock before S-divider.
[6:1]
Reserved
Reserved.
0
S-divider/2
Setting this bit enables an additional /2 prescaler. See the CMOS Output Divider (S-Divider) section.
If the desired S-divider setting is greater than 65,536, or if the signal on FDBK_IN is greater than 400 MHz,
this bit must be set.
FREQUENCY TUNING WORD (REGISTER 0x01A0 TO REGISTER 0x01AD)
Register 0x01A0 to Register 0x01A5—Reserved
Register 0x01A6—FTW0 (Frequency Tuning Word)
Table 24.
Bits
Bit Name
Description
[7:0]
FTW0
These registers contain the FTW (frequency tuning word) for the DDS. The FTW determines the ratio
of the AD9912 output frequency to its DAC system clock. Register 0x01A6 is the least significant byte
of the FTW. Note that the power-up default is defined by start-up Pin S1 to Pin S4. Updates to the FTW
results in an instantaneous frequency jump but no phase discontinuity.
Register 0x01A7—FTW0 (Frequency Tuning Word) (Continued)
Table 25.
Bits
Bit Name
Description
[15:8]
FTW0
These registers contain the FTW (frequency tuning word) for the DDS. The FTW determines the ratio
of the AD9912 output frequency to its DAC system clock. Register 0x01A6 is the least significant byte
of the FTW. Note that the power-up default is defined by start-up Pin S1 to Pin S4. Updates to the FTW
results in an instantaneous frequency jump but no phase discontinuity.
Register 0x01A8—FTW0 (Frequency Tuning Word) (Continued)
Table 26.
Bits
Bit Name
Description
[23:16]
FTW0
These registers contain the FTW (frequency tuning word) for the DDS. The FTW determines the ratio
of the AD9912 output frequency to its DAC system clock. Register 0x01A6 is the least significant byte
of the FTW. Note that the power-up default is defined by start-up Pin S1 to Pin S4. Updates to the FTW
results in an instantaneous frequency jump but no phase discontinuity.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| H1KXH-2636M | IDC CABLE - HPK26H/AE26M/X |
| 611430-000 | SOLDER SLEEVE .235" DIA W/LEAD |
| GMM12DTAN | CONN EDGECARD 24POS R/A .156 SLD |
| UPJ1H821MHD6TN | CAP ALUM 820UF 50V 20% RADIAL |
| GSM12DTAH | CONN EDGECARD 24POS R/A .156 SLD |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD9912BCPZ | 制造商:Analog Devices 功能描述:Direct Digital Synthesizer 1000MHz 1-DAC 14-Bit Serial 64-Pin LFCSP EP 制造商:Analog Devices 功能描述:DIRECT DGTL SYNTHESIZER 64LFCSP EP - Trays 制造商:Analog Devices 功能描述:IC DDS 1GSPS 14BIT DAC |
| AD9912BCPZ-REEL7 | 制造商:Analog Devices 功能描述:DIRECT DGTL SYNTHESIZER 64LFCSP EP - Tape and Reel |
| AD9913 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Low Power 250 MSPS 10-Bit DAC 1.8 V CMOS Direct Digital Synthesizer |
| AD9913/PCBZ | 功能描述:數(shù)據(jù)轉(zhuǎn)換 IC 開發(fā)工具 Sub 50mW 250MSPS (+) 10-bit DDS RoHS:否 制造商:Texas Instruments 產(chǎn)品:Demonstration Kits 類型:ADC 工具用于評估:ADS130E08 接口類型:SPI 工作電源電壓:- 6 V to + 6 V |
| AD9913/PCBZ1 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Low Power 250 MSPS 10-Bit DAC 1.8 V CMOS Direct Digital Synthesizer |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。