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參數(shù)資料
| 型號： | AD9912A/PCBZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 31/40頁 |
| 文件大?。?/td> | 0K |
| 描述： | BOARD EVALUATION FOR AD9912 |
| 產品培訓模塊： | Direct Digital Synthesis Tutorial Series (1 of 7): Introduction Direct Digital Synthesizer Tutorial Series (7 of 7): DDS in Action Direct Digital Synthesis Tutorial Series (3 of 7): Angle to Amplitude Converter Direct Digital Synthesis Tutorial Series (6 of 7): SINC Envelope Correction Direct Digital Synthesis Tutorial Series (4 of 7): Digital-to-Analog Converter Direct Digital Synthesis Tutorial Series (2 of 7): The Accumulator |
| 標準包裝： | 1 |
| 主要目的： | 計時，直接數(shù)字合成（DDS） |
| 嵌入式： | 否 |
| 已用 IC / 零件： | AD9912 |
| 主要屬性： | 14 位數(shù)模轉換器，48 位調節(jié)字寬 |
| 次要屬性： | 1GHz 圖形用戶界面 |
| 已供物品： | 板 |
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AD9912
Rev. F | Page 37 of 40
DOUBLER AND OUTPUT DRIVERS (REGISTER 0x0200 TO REGISTER 0x0201)
Register 0x0200—HSTL Driver
Table 32.
Bits
Bit Name
Description
4
OPOL
Output polarity. Setting this bit inverts the HSTL driver output polarity.
[3:2]
Reserved
Reserved.
[1:0]
HSTL output doubler
HSTL output doubler.
01 = doubler disabled.
10 = doubler enabled. When using doubler, Bit 5 in Register 0x0010 must also be set to 1.
Register 0x0201—CMOS Driver
Table 33.
Bits
Bit Name
Description
0
CMOS mux
This bit allows the user to select whether the CMOS driver output is divided by the S-divider.
0 = S-divider input sent to CMOS driver.
1 = S-divider output sent to CMOS driver. See Figure 39.
CALIBRATION (USER-ACCESSIBLE TRIM) (REGISTER 0x0400 TO REGISTER 0x0410)
Register 0x0400 to Register 0x040A—Reserved
Register 0x040B—DAC Full-Scale Current
Table 34.
Bits
Bit Name
Description
[7:0]
DAC full-scale current
DAC full-scale current, Bits[7:0]. See the Digital-to-Analog (DAC) Output section.
Register 0x040C—DAC Full-Scale Current (Continued)
Table 35.
Bits
Bit Name
Description
[9:8]
DAC full-scale current
DAC full-scale current, Bits[9:8]. See Register 0x040B.
Register 0x040D to Register 0x0410—Reserved
HARMONIC SPUR REDUCTION (REGISTER 0x0500 TO REGISTER 0x0509)
See the Harmonic Spur Reduction section.
Register 0x0500—Spur A
Table 36.
Bits
Bit Name
Description
7
HSR-A enable
Harmonic Spur Reduction A enable.
6
Amplitude gain × 2
Setting this bit doubles the gain of the cancelling circuit and also doubles the minimum step size.
[5:4]
Reserved
Reserved.
[3:0]
Spur A harmonic
Spur A Harmonic 1 to Spur A Harmonic 15. Allows user to choose which harmonic to eliminate.
Register 0x0501—Spur A (Continued)
Table 37.
Bits
Bit Name
Description
[7:0]
Spur A magnitude
Linear multiplier for Spur A magnitude.
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| AD9912BCPZ | 制造商:Analog Devices 功能描述:Direct Digital Synthesizer 1000MHz 1-DAC 14-Bit Serial 64-Pin LFCSP EP 制造商:Analog Devices 功能描述:DIRECT DGTL SYNTHESIZER 64LFCSP EP - Trays 制造商:Analog Devices 功能描述:IC DDS 1GSPS 14BIT DAC |
| AD9912BCPZ-REEL7 | 制造商:Analog Devices 功能描述:DIRECT DGTL SYNTHESIZER 64LFCSP EP - Tape and Reel |
| AD9913 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Low Power 250 MSPS 10-Bit DAC 1.8 V CMOS Direct Digital Synthesizer |
| AD9913/PCBZ | 功能描述:數(shù)據(jù)轉換 IC 開發(fā)工具 Sub 50mW 250MSPS (+) 10-bit DDS RoHS:否 制造商:Texas Instruments 產品:Demonstration Kits 類型:ADC 工具用于評估:ADS130E08 接口類型:SPI 工作電源電壓:- 6 V to + 6 V |
| AD9913/PCBZ1 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Low Power 250 MSPS 10-Bit DAC 1.8 V CMOS Direct Digital Synthesizer |
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