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| 型號： | AD9974BBCZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 18/52頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC CCDSP DUAL 14BIT 100-CSPBGA |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 類型： | CCD 信號處理器，14 位 |
| 輸入類型： | 邏輯 |
| 輸出類型： | 邏輯 |
| 接口： | 3 線串口 |
| 電流 - 電源： | 55mA |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 100-LFBGA，CSPBGA |
| 供應(yīng)商設(shè)備封裝： | 100-CSBGA（9x9） |
| 包裝： | 托盤 |
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AD9974
Rev. A | Page 25 of 52
COMPLETE FIELD—COMBINING H-PATTERNS
After the H-patterns are created, they combine to create different
readout fields. A field consists of up to nine different regions
determined by the SCP registers. Within each region, a different
H-pattern group can be selected up to a maximum of 32 groups.
Registers to control the H-patterns are located in the field registers.
Table 31 describes the field registers.
H-Pattern Selection
The H-patterns are stored in the HPAT memory, as described in
Table 20. The user decides how many H-pattern groups are
required, up to a maximum of 32, and then uses the HPAT_SEL
registers to select which H-pattern group is output in each
region of the field. Figure 34 shows how to use the HPAT_SEL
and SCP registers. The SCP registers create the line boundaries
for each region.
VD
REGION 0
FIELD SETTINGS:
1. SEQUENCE CHANGE POSITIONS (SCP0-8) DEFINE EACH OF THE NINE AVAILABLE REGIONS IN THE FIELD.
2. HPAT_SEL SELECTS THE DESIRED H-PATTERN FOR EACH REGION.
H-PATTERNS
HD
SCP 1
SCP 2
HPAT_SEL0
HPAT_SEL1
SCP3
HPAT_SEL2
SCP4
HPAT_SEL3
SCP5
HPAT_SEL4
SCP8
HPAT_SEL8
REGION 1
REGION 2
REGION 3
REGION 4
REGION 8
SCP 0
05
95
5-
03
4
Figure 34. Complete Field Divided into Regions
Table 14. Field Registers
Register
Length (Bits)
Range
Description
SCPx
13
0 to 8191 line number
Sequence change position for each region. Selects an individual line.
HPAT_SELx
5
0 to 31 H-patterns
Selected H-pattern for each region of the field.
CLPOB_POL
9
High/low
CLPOB start polarity settings for each region of the field.
CLPOB_PAT
9
0 to 9 patterns
CLPOB pattern selector for each region of the field.
CLPOBMASKSTARTx,
CLPOBMASKENDx
13
Number of lines
CLPOB mask positions for up to three masking configurations.
PBLK_POL
9
High/low
PBLK start polarity settings for each region of the field.
PBLK_PAT
9
0 to 9 patterns
PBLK pattern selector for each region of the field.
PBLKMASKSTARTx,
PBLKMASKENDx,
13
Number of lines
PBLK mask positions for up to three masking configurations.
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| AD9974BBCZRL | 功能描述:IC CCDSP DUAL 14BIT 100-CSPBGA RoHS:是 類別:集成電路 (IC) >> 接口 - 傳感器和探測器接口 系列:- 其它有關(guān)文件:Automotive Product Guide 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:74 系列:- 類型:觸控式傳感器 輸入類型:數(shù)字 輸出類型:數(shù)字 接口:JTAG，串行 電流 - 電源:100µA 安裝類型:表面貼裝 封裝/外殼:20-TSSOP（0.173"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:20-TSSOP 包裝:管件 |
| AD9975 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Broadband Modem Mixed-Signal Front End |
| AD9975ABST | 制造商:AD 制造商全稱:Analog Devices 功能描述:Broadband Modem Mixed-Signal Front End |
| AD9975ABSTEB | 制造商:AD 制造商全稱:Analog Devices 功能描述:Broadband Modem Mixed-Signal Front End |
| AD9975ABSTRL | 制造商:AD 制造商全稱:Analog Devices 功能描述:Broadband Modem Mixed-Signal Front End |
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