參數(shù)資料
型號: ADSP-2101BG-100
廠商: Analog Devices Inc
文件頁數(shù): 25/64頁
文件大?。?/td> 0K
描述: IC DSP CONTROLLER 16BIT 68PGA
標(biāo)準(zhǔn)包裝: 1
系列: ADSP-21xx
類型: 定點(diǎn)
接口: 同步串行端口(SSP)
時鐘速率: 25MHz
非易失內(nèi)存: 外部
芯片上RAM: 6kB
電壓 - 輸入/輸出: 5.00V
電壓 - 核心: 5.00V
工作溫度: -40°C ~ 85°C
安裝類型: 通孔
封裝/外殼: 68-BEPGA
供應(yīng)商設(shè)備封裝: 68-PGA(27.89x27.89)
包裝: 托盤
ADSP-21xx
REV. B
–31–
TIMING PARAMETERS (ADSP-2101/2105/2111/2115/2161/2163)
Frequency
13 MHz
13.824 MHz
16.67 MHz
20 MHz
25 MHz
Dependency
Parameter
Min
Max
Min
Max
Min Max
Min
Max
Unit
Timing Requirement:
tIFS
IRQx
1 or FI Setup before
34.2
33.1
30
27.5
25
0.25tCK + 15
4
ns
CLKOUT Low
2, 3
tIFS
IRQx
1 or FI Setup before
37.2
36.1
33
30.5
28
0.25tCK + 18
4
ns
CLKOUT Low (ADSP-2111)
2, 3
tIFH
IRQx
1 or FI Hold after CLKOUT 19.2
18.1
15
12.5
10
0.25tCK
ns
High
2, 3
Switching Characteristic:
tFOH
FO Hold after CLKOUT High
5
00
0
ns
tFOD
FO Delay from CLKOUT High
15
12
ns
NOTES
1IRQx=IRQ0, IRQ1, and IRQ2.
2If IRQx and FI inputs meet t
IFS and tIFH setup/hold requirements, they will be recognized during the current clock cycle; otherwise they will be recognized
during the following cycle. (Refer to the “Interrupt Controller” section in Chapter 3, Program Control, of the
ADSP-2100 Family User’s Manual for further
information on interrupt servicing.)
3Edge-sensitive interrupts require pulse widths greater than 10 ns. Level-sensitive interrupts must be held low until serviced.
4t
IFS (min) = 0.25tCK + 20 ns for ADSP-2101TG-50, ADSP-2101TG/883B-50, ADSP-2111TG-52, and ADSP-2111TG/883B-52 ( Extended Temperature Range
devices).
5t
FOH (min) = –5 ns for ADSP-2111TG-52 and ADSP-2111TG/883B-52 (Extended Temperature Range devices).
INTERRUPTS & FLAGS
Figure 30. Interrupts & Flags
CLKOUT
FLAG
OUTPUT(S)
t
FOD
IRQx
FI
t
FOH
t
IFH
t
IFS
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