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參數(shù)資料
| 型號(hào)： | ADSP-21992BSTZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 7/60頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DSP CONTROLLER 16BIT 176LQFP |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 系列： | ADSP-21xx |
| 類型： | 定點(diǎn) |
| 接口： | SPI，SSP |
| 時(shí)鐘速率： | 160MHz |
| 非易失內(nèi)存： | 外部 |
| 芯片上RAM： | 128kB |
| 電壓 - 輸入/輸出： | 3.30V |
| 電壓 - 核心： | 2.50V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 176-LQFP |
| 供應(yīng)商設(shè)備封裝： | 176-LQFP（24x24） |
| 包裝： | 托盤 |
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ADSP-21992
Rev. A
|
Page 15 of 60
|
August 2007
INSTRUCTION SET DESCRIPTION
The ADSP-21992 assembly language instruction set has an alge-
braic syntax that was designed for ease of coding and
readability. The assembly language, which takes full advantage
of the unique architecture of the processor, offers the following
benefits:
SHARC assembly language syntax is a superset of and
source code compatible (except for two data registers and
DAG base address registers) with ADSP-21xx family syn-
tax. It may be necessary to restructure ADSP-21xx
programs to accommodate the unified memory space of
the ADSP-21992 and to conform to its interrupt
vector map.
The algebraic syntax eliminates the need to remember
cryptic assembler mnemonics. For example, a typical arith-
metic add instruction, such as AR = AX0 + AY0, resembles
a simple equation.
Every instruction, but two, assembles into a single, 24-bit
word that can execute in a single instruction cycle. The
exceptions are two dual word instructions. One writes
16- or 24-bit immediate data to memory, and the other is
an absolute jump/call with the 24-bit address specified in
the instruction.
Multifunction instructions allow parallel execution of an
arithmetic, MAC, or shift instruction with up to two
fetches or one write to processor memory space during a
single instruction cycle.
Program flow instructions support a wider variety of con-
ditional and unconditional jumps/calls and a larger set of
conditions on which to base execution of conditional
instructions.
DEVELOPMENT TOOLS
The ADSP-21992 is supported with a complete set of
CROSSCORE software and hardware development tools,
including Analog Devices emulators and VisualDSP++ devel-
opment environment. The emulator hardware that supports
other SHARC DSPs also fully emulates the ADSP-21992.
The VisualDSP++ project management environment lets pro-
grammers develop and debug an application. This environment
includes an easy to use assembler (which is based on an alge-
braic syntax), an archiver (librarian/library builder), a linker, a
loader, a cycle-accurate instruction-level simulator, a C/C++
compiler, and a C/C++ runtime library that includes DSP and
mathematical functions. A key point for these tools is C/C++
code efficiency. The compiler has been developed for efficient
translation of C/C++ code to DSP assembly. The DSP has archi-
tectural features that improve the efficiency of compiled C/C++
code.
The VisualDSP++ debugger has a number of important fea-
tures. Data visualization is enhanced by a plotting package that
offers a significant level of flexibility. This graphical representa-
tion of user data enables the programmer to quickly determine
the performance of an algorithm. As algorithms grow in com-
plexity, this capability can have a significant influence on the
design development schedule by increasing productivity. Statis-
tical profiling enables the programmer to nonintrusively poll
the processor as it is running the program. This feature, unique
to VisualDSP++, enables the software developer to passively
gather important code execution metrics without interrupting
the real-time characteristics of the program. Essentially, the
developer can identify bottlenecks in software quickly and effi-
ciently. By using the profiler, the programmer can focus on
those areas in the program that impact performance and take
corrective action.
Debugging both C/C++ and assembly programs with the
VisualDSP++ debugger, programmers can:
View mixed C/C++ and assembly code (interleaved source
and object information)
Insert breakpoints
Set conditional breakpoints on registers, memory,
and stacks
Trace instruction execution
Perform linear or statistical profiling of program execution
Fill, dump, and graphically plot the contents of memory
Perform source level debugging
Create custom debugger windows
The VisualDSP++ IDDE lets programmers define and manage
DSP software development. Its dialog boxes and property pages
let programmers configure and manage all of the SHARC devel-
opment tools, including the color syntax highlighting in the
VisualDSP++ editor. This capability permits programmers to:
Control how the development tools process inputs and
generate outputs
Maintain a one-to-one correspondence with the command
line switches of the tool
The VisualDSP++ Kernel (VDK) incorporates scheduling and
resource management tailored specifically to address the mem-
ory and timing constraints of DSP programming. These
capabilities enable engineers to develop code more effectively,
eliminating the need to start from the very beginning, when
developing new application code. The VDK features include
threads, critical and unscheduled regions, semaphores, events,
and device flags. The VDK also supports priority-based, pre-
emptive, cooperative, and time-sliced scheduling approaches. In
addition, the VDK was designed to be scalable. If the application
does not use a specific feature, the support code for that feature
is excluded from the target system.
Because the VDK is a library, a developer can decide whether to
use it or not. The VDK is integrated into the VisualDSP++
development environment, but can also be used via standard
command line tools. When the VDK is used, the development
environment assists the developer with many error-prone tasks
and assists in managing system resources, automating the gen-
eration of various VDK-based objects, and visualizing the
system state, when debugging an application that uses the VDK.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADSP-21992YBC | 功能描述:IC DSP CTLR 16BIT 196CSPBGA RoHS:否 類別:集成電路 (IC) >> 嵌入式 - DSP（數(shù)字式信號(hào)處理器） 系列:ADSP-21xx 標(biāo)準(zhǔn)包裝:2 系列:StarCore 類型:SC140 內(nèi)核 接口:DSI，以太網(wǎng)，RS-232 時(shí)鐘速率:400MHz 非易失內(nèi)存:外部 芯片上RAM:1.436MB 電壓 - 輸入/輸出:3.30V 電壓 - 核心:1.20V 工作溫度:-40°C ~ 105°C 安裝類型:表面貼裝 封裝/外殼:431-BFBGA，F(xiàn)CBGA 供應(yīng)商設(shè)備封裝:431-FCPBGA（20x20） 包裝:托盤 |
| ADSP-21992YST | 制造商:Analog Devices 功能描述: |
| ADSP-21BT101JST | 制造商:Analog Devices 功能描述: |
| ADSP21CSP01BS200 | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| ADSP21CSP01KS200 | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
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