Rev. C
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Page 28 of 100
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February 2010
ADSP-BF542/ADSP-BF544/ADSP-BF547/ADSP-BF548/ADSP-BF549
Port D: GPIO/PPI0–2/SPORT 1/Keypad/Host DMA
PD0 /PPI1_D0/ HOST_D8/ TFS1 /PPI0_D18
I/O GPIO/PPI1 Data/ Host DMA/ SPORT1 Transmit Frame Sync /PPI0 Data
C
PD1 /PPI1_D1/ HOST_D9/ DT1SEC/PPI0_D19
I/O GPIO/PPI1 Data/ Host DMA/ SPORT1 Transmit Data Secondary / PPI0 Data C
PD2 /PPI1_D2/ HOST_D10 / DT1PRI /PPI0_D20
I/O GPIO/PPI1 Data/ Host DMA/ SPORT1 Transmit Data Primary /PPI0 Data
C
PD3 /PPI1_D3/ HOST_D11 / TSCLK1/ PPI0_D21
I/O GPIO/PPI1 Data/ Host DMA/ SPORT1 Transmit Serial Clock /PPI0 Data
A
PD4 /PPI1_D4/ HOST_D12 /RFS1 /PPI0_D22
I/O GPIO/PPI1 Data/ Host DMA/ SPORT1 Receive Frame Sync/PPI0 Data
C
PD5/PPI1_D5 /HOST_D13/ DR1SEC /PPI0_D23
I/O GPIO/PPI1 Data/ Host DMA/ SPORT1 Receive Data Secondary /PPI0 Data C
PD6 /PPI1_D6/ HOST_D14 /DR1PRI
I/O GPIO/PPI1 Data/ Host DMA/ SPORT1 Receive Data Primary
C
PD7 /PPI1_D7/ HOST_D15 /RSCLK1
I/O GPIO/PPI1 Data /Host DMA/SPORT1 Receive Serial Clock
A
PD8 /PPI1_D8/ HOST_D0/ PPI2_D0/KEY_ROW0
I/O GPIO/PPI1 Data/ Host DMA/ PPI2 Data/Keypad Row Input
A
PD9 /PPI1_D9/ HOST_D1/ PPI2_D1 /KEY_ROW1
I/O GPIO/PPI1 Data/ Host DMA/ PPI2 Data/Keypad Row Input
A
PD10 /PPI1_D10/ HOST_D2/ PPI2_D2 /KEY_ROW2
I/O GPIO/PPI1 Data/ Host DMA/ PPI2 Data/Keypad Row Input
A
PD11 /PPI1_D11/ HOST_D3/ PPI2_D3 /KEY_ROW3
I/O GPIO/PPI1 Data/ Host DMA/ PPI2 Data/Keypad Row Input
A
PD12 /PPI1_D12/ HOST_D4/ PPI2_D4 /KEY_COL0
I/O GPIO/PPI1 Data/ Host DMA/ PPI2 Data/Keypad Column Output
A
PD13 /PPI1_D13/ HOST_D5/ PPI2_D5 /KEY_COL1
I/O GPIO/PPI1 Data/ Host DMA/ PPI2 Data/Keypad Column Output
A
PD14 /PPI1_D14/ HOST_D6/ PPI2_D6 /KEY_COL2
I/O GPIO/PPI1 Data/ Host DMA/ PPI2 Data/Keypad Column Output
A
PD15 /PPI1_D15/ HOST_D7/ PPI2_D7 /KEY_COL3
I/O GPIO/PPI1 Data/ Host DMA/ PPI2 Data/Keypad Column Output
A
Port E: GPIO/SPI0/UART0-1/PPI1/TWI0/Keypad
PE0/ SPI0SCK / KEY_COL7
3
I/O GPIO/SPI0 Clock/Keypad Column Output
A
PE1/ SPI0MISO/ KEY_ROW6
3
I/O GPIO/SPI0 Master In Slave Out /Keypad Row Input
C
PE2/ SPI0MOSI/ KEY_COL6
I/O GPIO/SPI0 Master Out Slave In/Keypad Column Output
C
PE3/ SPI0SS/ KEY_ROW5
I/O GPIO/SPI0 Slave Select Input/ Keypad Row Input
A
PE4/ SPI0SEL1/ KEY_COL
3
I/O GPIO/SPI0 Slave Select Enable 1/ Keypad Column Output
A
PE5/ SPI0SEL2/ KEY_ROW4
I/O GPIO/SPI0 Slave Select Enable 2/ Keypad Row Input
A
PE6/ SPI0SEL3/ KEY_COL4
I/O GPIO/SPI0 Slave Select Enable 3/ Keypad Column Output
A
PE7/ UART0TX/ KEY_ROW7
I/O GPIO/UART0 Transmit/ Keypad Row Input
A
PE8/ UART0RX/TACI0
I/O GPIO/UART0 Receive /Alternate Capture Input 0
A
PE9/ UART1RTS
I/O GPIO/UART1 Request to Send
A
PE10 /UART1CTS
I/O GPIO/UART1 Clear to Send
A
PE11 /PPI1_CLK
I/O GPIO / PPI1Clock
A
PE12 /PPI1_FS1
I/O GPIO/PPI1 Frame Sync 1
A
PE13 /PPI1_FS2
I/O GPIO/PPI1 Frame Sync 2
A
PE14 /SCL0
I/O GPIO/TWI0 Serial Clock (Open-drain output: requires a pull-up resistor.) E
PE15 /SDA0
I/O GPIO/TWI0 Serial Data (Open-drain output: requires a pull-up resistor.) E
Table 12. Pin Descriptions (Continued)
Pin Name
I/O1 Function (First / Second/Third/Fourth)
Driver
Type2