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參數(shù)資料
| 型號(hào)： | ADV7180KST48Z |
| 廠(chǎng)商： | Analog Devices Inc |
| 文件頁(yè)數(shù)： | 38/116頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC VID DECOD SDTV 10BIT 48LQFP |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 類(lèi)型： | 視頻解碼器 |
| 應(yīng)用： | 數(shù)碼相機(jī)，手機(jī)，便攜式視頻 |
| 安裝類(lèi)型： | 表面貼裝 |
| 封裝/外殼： | 48-LQFP |
| 供應(yīng)商設(shè)備封裝： | 48-LQFP（7x7） |
| 包裝： | 托盤(pán) |
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ADV7180
Data Sheet
Rev. I | Page 28 of 116
AD_SECAM_EN, Enable Autodetection of SECAM,
Address 0x07[6]
Setting AD_SECAM_EN to 0 (default) disables the autodetection
of SECAM.
Setting AD_SECAM_EN to 1 enables the detection of SECAM.
AD_N443_EN, Enable Autodetection of NTSC 4.43,
Address 0x07[5]
Setting AD_N443_EN to 0 disables the autodetection of NTSC
style systems with a 4.43 MHz color subcarrier.
Setting AD_N443_EN to 1 (default) enables the detection of
NTSC style systems with a 4.43 MHz color subcarrier.
AD_P60_EN, Enable Autodetection of PAL 60,
Address 0x07[4]
Setting AD_P60_EN to 0 disables the autodetection of PAL
systems with a 60 Hz field rate.
Setting AD_P60_EN to 1 (default) enables the detection of PAL
systems with a 60 Hz field rate.
AD_PALN_EN, Enable Autodetection of PAL N,
Address 0x07[3]
Setting AD_PALN_EN to 0 (default) disables the detection of
the PAL N standard.
Setting AD_PALN_EN to 1 enables the detection of the PAL N
standard.
AD_PALM_EN, Enable Autodetection of PAL M,
Address 0x07[2]
Setting AD_PALM_EN to 0 (default) disables the autodetection
of PAL M.
Setting AD_PALM_EN to 1 enables the detection of PAL M.
AD_NTSC_EN, Enable Autodetection of NTSC,
Address 0x07[1]
Setting AD_NTSC_EN to 0 (default) disables the detection of
standard NTSC.
Setting AD_NTSC_EN to 1 enables the detection of standard NTSC.
AD_PAL_EN, Enable Autodetection of PAL B/D/I/G/H,
Address 0x07[0]
Setting AD_PAL_EN to 0 (default) disables the detection of
standard PAL.
Setting AD_PAL_EN to 1 enables the detection of standard PAL.
SFL_INV, Subcarrier Frequency Lock Inversion
This bit controls the behavior of the PAL switch bit in the SFL
(genlock telegram) data stream. It was implemented to solve
some compatibility issues with video encoders. It solves two
problems.
First, the PAL switch bit is only meaningful in PAL. Some
encoders (including Analog Devices encoders) also look at the
state of this bit in NTSC.
Second, there was a design change in Analog Devices encoders
from ADV717x to ADV719x. The older versions used the SFL
(genlock telegram) bit directly, whereas the newer ones invert
the bit prior to using it. The reason for this is that the inversion
compensated for the one line delay of an SFL (genlock telegram)
transmission.
As a result, for the ADV717x and ADV73xx encoders, the PAL
switch bit in the SFL (genlock telegram) must be 0 for NTSC to
work. For the ADV7194 video encoder, the PAL switch bit in the
SFL must be 1 to work in NTSC. If the state of the PAL switch bit
is wrong, a 180° phase shift occurs.
In a decoder/encoder back-to-back system in which SFL is used,
this bit must be set up properly for the specific encoder used.
SFL_INV, Subcarrier Frequency Lock Inversion,
Address 0x41[6]
Setting SFL_INV to 0 (default) makes the part SFL compatible
with the ADV717x and ADV73xx video encoders.
Setting SFL_INV to 1 makes the part SFL compatible with the
ADV7194 video encoder.
Lock Related Controls
Lock information is presented to the user through Bits[1:0] of
the Status 1 register (see the Status 1[7:0], Address 0x10[7:0]
section). Figure 21 outlines the signal flow and the controls
available to influence the way the lock status information is
generated.
1
0
TIME_WIN
FREE_RUN
STATUS 1[0]
SELECT THE RAW LOCK SIGNAL
SRLS
FILTER THE RAW LOCK SIGNAL
CIL[2:0], COL[2:0]
TAKE fSC LOCK INTO ACCOUNT
FSCLE
STATUS 1[1]
fSC LOCK
1
0
COUNTER INTO LOCK
COUNTER OUT OF LOCK
MEMORY
05700-
016
Figure 21. Lock Related Signal Path
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