參數(shù)資料
型號： ADV7180KST48Z
廠商： Analog Devices Inc
文件頁數(shù)： 63/116頁
文件大小： 0K
描述： IC VID DECOD SDTV 10BIT 48LQFP
標(biāo)準(zhǔn)包裝： 1
類型： 視頻解碼器
應(yīng)用： 數(shù)碼相機(jī)，手機(jī)，便攜式視頻
安裝類型： 表面貼裝
封裝/外殼： 48-LQFP
供應(yīng)商設(shè)備封裝： 48-LQFP（7x7）
包裝： 托盤
ADV7180
Data Sheet
Rev. I | Page 50 of 116
ADVANCE BEGIN OF
VSYNC BY NVBEG[4:0]
DELAY BEGIN OF
VSYNC BY NVBEG[4:0]
VSYNC BEGIN
NVBEGSIGN
ODD FIELD?
0
1
NO
YES
NVBEGDELO
VSBHO
ADDITIONAL
DELAY BY
1LINE
ADVANCE BY
0.5 LINE
1
0
1
0
NVBEGDELE
VSBHE
ADDITIONAL
DELAY BY
1LINE
ADVANCE BY
0.5 LINE
1
0
1
0
NOT VALID FOR USER
PROGRAMMING
05
70
0-
0
31
Figure 40. NTSC VSYNC Begin
NVBEGDELO, NTSC VSYNC Begin Delay on Odd Field,
Address 0xE5[7]
When NVBEGDELO is 0 (default), there is no delay.
Setting NVBEGDELO to 1 delays VSYNC going high on an odd
field by a line relative to NVBEG.
NVBEGDELE, NTSC VSYNC Begin Delay on Even Field,
Address 0xE5[6]
When NVBEGDELE is 0 (default), there is no delay.
Setting NVBEGDELE to 1 delays VSYNC going high on an
even field by a line relative to NVBEG.
NVBEGSIGN, NTSC VSYNC Begin Sign, Address 0xE5[5]
Setting NVBEGSIGN to 0 delays the start of VSYNC. Set for
user manual programming.
Setting NVBEGSIGN to 1 (default) advances the start of
VSYNC (not recommended for user programming).
NVBEG[4:0], NTSC VSYNC Begin, Address 0xE5[4:0]
The default value of NVBEG is 00101, indicating the NTSC
VSYNC begin position.
For all NTSC/PAL VSYNC timing controls, both the V bit in
the AV code and the VSYNC signal on the VS pin are modified.
ADVANCE END OF
VSYNC BY NVEND[4:0]
DELAY END OF VSYNC
BY NVEND[4:0]
VSYNC END
NVENDSIGN
ODD FIELD?
0
1
NO
YES
NVENDDELO
VSEHO
ADDITIONAL
DELAY BY
1LINE
ADVANCE BY
0.5 LINE
1
0
1
0
NVENDDELE
VSEHE
ADDITIONAL
DELAY BY
1LINE
ADVANCE BY
0.5 LINE
1
0
1
0
NOT VALID FOR USER
PROGRAMMING
05
70
0-
0
32
Figure 41. NTSC VSYNC End
NVENDDELO, NTSC VSYNC End Delay on Odd Field,
Address 0xE6[7]
When NVENDDELO is 0 (default), there is no delay.
Setting NVENDDELO to 1 delays VSYNC from going low on
an odd field by a line relative to NVEND.
NVENDDELE, NTSC VSYNC End Delay on Even Field,
Address 0xE6[6]
When NVENDDELE is set to 0 (default), there is no delay.
Setting NVENDDELE to 1 delays VSYNC from going low on an
even field by a line relative to NVEND.
NVENDSIGN, NTSC VSYNC End Sign, Address 0xE6[5]
Setting NVENDSIGN to 0 (default) delays the end of VSYNC.
Set for user manual programming.
Setting NVENDSIGN to 1 advances the end of VSYNC (not
recommended for user programming).
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參數(shù)描述
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ADV7180WBCP32Z 制造商:Analog Devices 功能描述:IC, 10-BIT 4X OVERSAMPLING SDTV DECODER 制造商:Analog Devices 功能描述:SDTV VIDEO DECODER 32-PIN LFCSP EP TRAY - Trays
ADV7180WBCP32Z-RL 制造商:Analog Devices 功能描述:10-BIT, 4? OVERSAMPLING SDTV VIDEO DECODER - Tape and Reel
ADV7180WBCPZ 功能描述:IC VIDEO DECODER SDTV 40LFCSP RoHS:是 類別:集成電路 (IC) >> 線性 - 視頻處理 系列:- 產(chǎn)品變化通告:Product Discontinuation 07/Mar/2011 標(biāo)準(zhǔn)包裝:3,000 系列:OMNITUNE™ 類型:調(diào)諧器 應(yīng)用:移動電話，手機(jī)，視頻顯示器 安裝類型:表面貼裝 封裝/外殼:65-WFBGA 供應(yīng)商設(shè)備封裝:PG-WFSGA-65 包裝:帶卷 (TR) 其它名稱:SP000365064
ADV7180WBCPZ-REEL 功能描述:IC VIDEO DECODER SDTV 40LFCSP RoHS:是 類別:集成電路 (IC) >> 線性 - 視頻處理 系列:- 產(chǎn)品變化通告:Product Discontinuation 07/Mar/2011 標(biāo)準(zhǔn)包裝:3,000 系列:OMNITUNE™ 類型:調(diào)諧器 應(yīng)用:移動電話，手機(jī)，視頻顯示器 安裝類型:表面貼裝 封裝/外殼:65-WFBGA 供應(yīng)商設(shè)備封裝:PG-WFSGA-65 包裝:帶卷 (TR) 其它名稱:SP000365064
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