參數(shù)資料
型號： ADV7189BKSTZ
廠商： Analog Devices Inc
文件頁數(shù)： 59/104頁
文件大?。?/td> 0K
描述： IC DECODER VIDEO W/ADC 80LQFP
標(biāo)準(zhǔn)包裝： 1
類型： 視頻解碼器
應(yīng)用： 機頂盒，視頻播放器，錄音機
電壓 - 電源，模擬： 3.15 V ~ 3.45 V
電壓 - 電源，數(shù)字： 1.65 V ~ 2 V
安裝類型： 表面貼裝
封裝/外殼： 80-LQFP
供應(yīng)商設(shè)備封裝： 80-LQFP（14x14）
包裝： 托盤
產(chǎn)品目錄頁面： 788 (CN2011-ZH PDF)
ADV7189B
Rev. B | Page 58 of 104
Table 75. PAL Line Enable Bits and
Corresponding Line Numbering
Line[3:0]
Line Number
(ITU-R BT.470)
Enable Bit
Comment
12
8
GDECOL[0]
Not valid
13
9
GDECOL[1]
Not valid
14
10
GDECOL[2]
Not valid
15
11
GDECOL[3]
Not valid
0
12
GDECOL[4]
Not valid
1
13
GDECOL[5]
Not valid
2
14
GDECOL[6]
Not valid
3
15
GDECOL[7]
Not valid
4
16
GDECOL[8]
Not valid
5
17
GDECOL[9]
Not valid
6
18
GDECOL[10]
Not valid
7
19
GDECOL[11]
Not valid
8
20
GDECOL[12]
Not valid
9
21
GDECOL[13]
Not valid
10
22
GDECOL[14]
Closed caption
11
23
GDECOL[15]
Not valid
12
321 (8)
GDECEL[0]
Not valid
13
322 (9)
GDECEL[1]
Not valid
14
323 (10)
GDECEL[2]
Not valid
15
324 (11)
GDECEL[3]
Not valid
0
325 (12)
GDECEL[4]
Not valid
1
326 (13)
GDECEL[5]
Not valid
2
327 (14)
GDECEL[6]
Not valid
3
328 (15)
GDECEL[7]
Not valid
4
329 (16)
GDECEL[8]
Not valid
5
330 (17)
GDECEL[9]
Not valid
6
331 (18)
GDECEL[10]
Not valid
7
332 (19)
GDECEL[11]
Not valid
8
333 (20)
GDECEL[12]
Not valid
9
334 (21)
GDECEL[13]
Not valid
10
335 (22)
GDECEL[14]
Closed caption
11
336 (23)
GDECEL[15]
Not valid
IF Compensation Filter
IFFILTSEL[2:0] IF Filter Select Address 0xF8[2:0]
The IFFILTSEL[2:0] register allows the user to compensate for
SAW filter characteristics on a composite input as would be
observed on tuner outputs.
245H
Figure 36 and
246H
Figure 37 show IF
filter compensation for NTSC and PAL.
The options for this feature are as follows:
Bypass Mode (default)
NTSC—consists of three filter characteristics
PAL—consists of three filter characteristics
04983-0-043
FREQUENCY (MHz)
2.0
4.0
3.5
3.0
2.5
5.0
4.5
–12
–10
–8
–6
–4
–2
0
2
4
6
AMP
LITUDE
(dB)
Figure 36. NTSC IF Compensation Filter Responses
04983-0-045
FREQUENCY (MHz)
3.0
5.0
4.5
4.0
3.5
6.0
5.5
–8
–6
–4
–2
0
2
4
6
AMP
LITUDE
(dB)
Figure 37. PAL IF Compensation Filter Responses
See
247H
Table 86 for programming details.
I
P
2
P
C Interrupt System
The ADV7189B has a comprehensive interrupt register set. This
map is located in the Register Access. See
248H
Table 85 for details of
the interrupt register map. How to access this map is described
in
249H
Figure 38.
04983-0-044
COMMON I2C SPACE
ADDRESS 0x00 => 0x3F
ADDRESS 0x0E BIT 6,5 = 00b
ADDRESS 0x0E BIT 6,5 = 01b
I2C SPACE
REGISTER ACCESS PAGE 1
ADDRESS 0x40 => 0xFF
NORMAL REGISTER SPACE
I2C SPACE
REGISTER ACCESS PAGE 2
ADDRESS 0x40 => 0x4C
INTERRUPT REGISTER SPACE
Figure 38. Register Access, Page 1 and Page 2
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