參數(shù)資料
型號： AGLP125V5CSG281I
元件分類： FPGA
英文描述： FPGA, 3120 CLBS, 125000 GATES, PBGA281
封裝： 10 X 10 MM, 1.05 MM HEIGHT, 0.5 MM PITCH, ROHS COMPLIANT, CSP-281
文件頁數(shù)： 68/128頁
文件大?。?/td> 4383K
代理商： AGLP125V5CSG281I
IGLOO PLUS DC and Switching Characteristics
2- 30
R e v i sio n 1 1
Timing Characteristics
Applies to 1.5 V DC Core Voltage
Applies to 1.2 V DC Core Voltage
Table 2-42 3.3 V LVCMOS Wide Range Low Slew – Applies to 1.5 V DC Core Voltage
Commercial-Case Conditions: TJ = 70°C, Worst-Case VCC = 1.425 V, Worst-Case VCCI = 2.7 V
Drive
Strength
Equivalent
Software
Default
Drive
Strength
Option1
Speed
Grade
tDOUT
tDP
tDIN
tPY
tPYS
tEOUT
tZL
tZH
tLZ
tHZ
Units
100 A
4 mA
STD
0.97
5.85
0.18
1.18
1.64
0.66
5.86
5.05
2.57
ns
100 A
6 mA
STD
0.97
4.70
0.18
1.18
1.64
0.66
4.72
4.27
2.92
3.19
ns
100 A
8 mA
STD
0.97
4.70
0.18
1.18
1.64
0.66
4.72
4.27
2.92
3.19
ns
100 A
12 mA
STD
0.97
3.96
0.18
1.18
1.64
0.66
3.98
3.70
3.16
3.59
ns
100 A
16 mA
STD
0.97
3.96
0.18
1.18
1.64
0.66
3.98
3.70
3.16
3.59
ns
Notes:
1. The minimum drive strength for any LVCMOS 3.3 V software configuration when run in wide range is ±100 A. Drive
strength displayed in the software is supported for normal range only. For a detailed I/V curve, refer to the IBIS models.
2. For specific junction temperature and voltage supply levels, refer to Table 2-6 on page 2-6 for derating values.
Table 2-43 3.3 V LVCMOS Wide Range High Slew – Applies to 1.5 V DC Core Voltage
Commercial-Case Conditions: TJ = 70°C, Worst-Case VCC = 1.425 V, Worst-Case VCCI = 2.7 V
Drive
Strength
Equivalent
Software
Default
Drive
Strength
Option1
Speed
Grade
tDOUT
tDP
tDIN
tPY
tPYS
tEOUT
tZL
tZH
tLZ
tHZ
Units
100 A
4 mA
STD
0.97
3.39
0.18
1.18
1.64
0.66
3.41
2.69
2.57
2.73
ns
100 A
6 mA
STD
0.97
2.79
0.18
1.18
1.64
0.66
2.80
2.17
2.92
3.36
ns
100 A
8 mA
STD
0.97
2.79
0.18
1.18
1.64
0.66
2.80
2.17
2.92
3.36
ns
100 A
12 mA
STD
0.97
2.47
0.18
1.18
1.64
0.66
2.48
1.91
3.16
3.76
ns
100 A
16 mA
STD
0.97
2.47
0.18
1.18
1.64
0.66
2.48
1.91
3.16
3.76
ns
Notes:
1. The minimum drive strength for any LVCMOS 3.3 V software configuration when run in wide range is ±100 A. Drive
strength displayed in the software is supported for normal range only. For a detailed I/V curve, refer to the IBIS models.
2. For specific junction temperature and voltage supply levels, refer to Table 2-6 on page 2-6 for derating values.
3. Software default selection highlighted in gray.
相關(guān)PDF資料
PDF描述
AGLP125V5CSG281 FPGA, 3120 CLBS, 125000 GATES, PBGA281
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
AGLP125V5-CSG281I 功能描述:IC FPGA IGLOO PLUS 125K 281-CSP RoHS:是 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場可編程門陣列） 系列:IGLOO PLUS 標(biāo)準(zhǔn)包裝:90 系列:ProASIC3 LAB/CLB數(shù):- 邏輯元件/單元數(shù):- RAM 位總計:36864 輸入/輸出數(shù):157 門數(shù):250000 電源電壓:1.425 V ~ 1.575 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 125°C 封裝/外殼:256-LBGA 供應(yīng)商設(shè)備封裝:256-FPBGA（17x17）
AGLP125-V5CSG289 制造商:ACTEL 制造商全稱:Actel Corporation 功能描述:IGLOO PLUS Low-Power Flash FPGAs with FlashFreeze Technology
AGLP125V5-CSG289 功能描述:IC FPGA IGLOO PLUS 125K 289-CSP RoHS:是 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場可編程門陣列） 系列:IGLOO PLUS 標(biāo)準(zhǔn)包裝:152 系列:IGLOO PLUS LAB/CLB數(shù):- 邏輯元件/單元數(shù):792 RAM 位總計:- 輸入/輸出數(shù):120 門數(shù):30000 電源電壓:1.14 V ~ 1.575 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 85°C 封裝/外殼:289-TFBGA，CSBGA 供應(yīng)商設(shè)備封裝:289-CSP（14x14）
AGLP125-V5CSG289ES 制造商:ACTEL 制造商全稱:Actel Corporation 功能描述:IGLOO PLUS Low-Power Flash FPGAs with FlashFreeze Technology
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