參數(shù)資料
型號(hào): AM29LV320DB120
廠商: Advanced Micro Devices, Inc.
英文描述: 32 Megabit (4 M x 8-Bit/2 M x 16-Bit) CMOS 3.0 Volt-only, Boot Sector Flash Memory
中文描述: 32兆位(4個(gè)M × 8位/ 2米x 16位),3.0伏的CMOS只,引導(dǎo)扇區(qū)閃存
文件頁數(shù): 12/55頁
文件大?。?/td> 1258K
代理商: AM29LV320DB120
12
Am29LV320D
November 15, 2004
The internal state machine is set for reading
array data upon device power-up, or after a
hardware reset. This ensures that no spurious
alteration of the memory content occurs during
the power transition. No command is necessary
in this mode to obtain array data. Standard mi-
croprocessor read cycles that assert valid ad-
dresses on the device address inputs produce
valid data on the device data outputs. The de-
vice remains enabled for read access until the
command register contents are altered.
See
“Requirements for Reading Array Data” on
page 11
for more information. Refer to the AC
Read-Only Operations table for timing specifi-
cations and to
Figure 14, on page 38
for the
timing diagram. I
CC1
in the DC Characteristics
table represents the active current specification
for reading array data.
Writing Commands/Command Sequences
To write a command or command sequence
(which includes programming data to the de-
vice and erasing sectors of memory), the sys-
tem must drive WE# and CE# to V
IL
, and OE#
to V
IH
.
For program operations, the BYTE# pin deter-
mines whether the device accepts program
data in bytes or words. Refer to
“Word/Byte
Configuration” on page 11
for more informa-
tion.
The device features an
Unlock Bypass
mode
to facilitate faster programming. Once the de-
vice enters the Unlock Bypass mode, only two
write cycles are required to program a word or
byte, instead of four. The
“Word/Byte Configu-
ration” on page 11
section contains details on
programming data to the device using both
standard and Unlock Bypass command se-
quences.
An erase operation can erase one sector, multi-
ple sectors, or the entire device.
Table 2, on
page 13
through
Table 5, on page 16
indicate
the address space that each sector occupies. A
“sector address” is the address bits required to
uniquely select a sector.
I
CC2
in the DC Characteristics table represents
the active current specification for the write
mode. The
“AC Characteristics” on page 38
sec-
tion contains timing specification tables and
timing diagrams for write operations.
Accelerated Program Operation
The device offers accelerated program opera-
tions through the ACC function. This is one of
two functions provided by the WP#/ACC pin.
This function is primarily intended to allow
faster manufacturing throughput at the factory.
If the system asserts V
HH
on this pin, the device
automatically enters the aforementioned Un-
lock Bypass mode, temporarily unprotects any
protected sectors, and uses the higher voltage
on the pin to reduce the time required for pro-
gram operations. The system would use a
two-cycle program command sequence as re-
quired by the Unlock Bypass mode. Removing
V
HH
from the WP#/ACC pin returns the device
to normal operation. Note that the WP#/ACC
pin must not be at V
HH
for operations other
than accelerated programming, or device dam-
age may result. In addition, the WP#/ACC pin
must not be left floating or unconnected; incon-
sistent behavior of the device may result.
Autoselect Functions
If the system writes the autoselect command
sequence, the device enters the autoselect
mode. The system can then read autoselect
codes from the internal register (which is sepa-
rate from the memory array) on DQ7–DQ0.
Standard read cycle timings apply in this mode.
Refer to the
“Autoselect Mode” on page 16
and
“Autoselect Command Sequence” on page 25
sections for more information.
I
CC6
and I
CC7
in the DC Characteristics table
represent the current specifications for
read-while-program and read-while-erase, re-
spectively.
Standby Mode
When the system is not reading or writing to
the device, it can place the device in the
standby mode. In this mode, current consump-
tion is greatly reduced, and the outputs are
placed in the high impedance state, indepen-
dent of the OE# input.
The device enters the CMOS standby mode
when the CE# and RESET# pins are both held
at V
CC
± 0.3 V. (Note that this is a more re-
stricted voltage range than V
IH
.) If CE# and RE-
SET# are held at V
IH
, but not within V
CC
± 0.3
V, the device is in the standby mode, but the
standby current is greater. The device requires
standard access time (t
CE
) for read access when
the device is in either of these standby modes,
before it is ready to read data.
If the device is deselected during erasure or
programming, the device draws active current
until the operation is completed.
I
CC3
in the DC Characteristics table represents
the standby current specification.
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