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參數(shù)資料
| 型號： | AM29LV320DB120 |
| 廠商： | Advanced Micro Devices, Inc. |
| 英文描述： | 32 Megabit (4 M x 8-Bit/2 M x 16-Bit) CMOS 3.0 Volt-only, Boot Sector Flash Memory |
| 中文描述： | 32兆位（4個M × 8位/ 2米x 16位），3.0伏的CMOS只，引導(dǎo)扇區(qū)閃存 |
| 文件頁數(shù)： | 27/55頁 |
| 文件大?。?/td> | 1258K |
| 代理商： | AM29LV320DB120 |
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November 15, 2004
Am29LV320D
27
Figure 4.
Program Operation
Chip Erase Command Sequence
Chip erase is a six bus cycle operation. The chip
erase command sequence is initiated by writing
two unlock cycles, followed by a set-up com-
mand. Two additional unlock write cycles are
then followed by the chip erase command,
which in turn invokes the Embedded Erase al-
gorithm. The device does
not
require the sys-
tem to preprogram prior to erase. The
Embedded Erase algorithm automatically pre-
programs and verifies the entire memory for an
all zero data pattern prior to electrical erase.
The system is not required to provide any con-
trols or timings during these operations.
Table 14, on page 29
shows the address and
data requirements for the chip erase command
sequence.
Note that the autoselect, SecSi Sec-
tor, and CFI modes are unavailable while an
erase operation is in progress.
When the Embedded Erase algorithm is com-
plete, the device returns to the read mode and
addresses are no longer latched. The system
can determine the status of the erase operation
by using DQ7, DQ6, DQ2, or RY/BY#. Refer to
“Write Operation Status” on page 30
for infor-
mation on these status bits.
Any commands written during the chip erase
operation are ignored. However, note that a
hardware reset
immediately terminates the
erase operation. If that occurs, the chip erase
command sequence should be reinitiated once
the device returns to reading array data, to en-
sure data integrity.
Figure 5, on page 28
illustrates the algorithm
for the erase operation. Refer to table
“Erase
and Program Operations” on page 41
for pa-
rameters, and
Figure 19, on page 43
section for
timing diagrams.
Sector Erase Command Sequence
Sector erase is a six bus cycle operation. The
sector erase command sequence is initiated by
writing two unlock cycles, followed by a set-up
command. Two additional unlock cycles are
written, and are then followed by the address
of the sector to be erased, and the sector erase
command.
Table 14, on page 29
shows the ad-
dress and data requirements for the sector
erase command sequence.
Note that the au-
toselect, SecSi Sector, and CFI modes are un-
available while an erase operation is in
progress.
The device does
not
require the system to pre-
program prior to erase. The Embedded Erase
algorithm automatically programs and verifies
the entire memory for an all zero data pattern
prior to electrical erase. The system is not re-
quired to provide any controls or timings during
these operations.
After the command sequence is written, a sec-
tor erase time-out of 50 μs occurs. During the
time-out period, additional sector addresses
and sector erase commands may be written.
Loading the sector erase buffer may be done in
any sequence, and the number of sectors may
be from one sector to all sectors. The time be-
tween these additional cycles must be less than
50 μs, otherwise the last address and com-
mand may not be accepted, and erasure may
begin. It is recommended that processor inter-
rupts be disabled during this time to ensure all
commands are accepted. The interrupts can be
re-enabled after the last Sector Erase com-
mand is written.
Any command other than
Sector Erase or Erase Suspend during the
START
Write Program
Command Sequence
Data Poll
from System
Verify Data
No
Yes
Last Address
No
Yes
Programming
Completed
Increment Address
Embedded
Program
algorithm
in progress
Note:
See
Table 14, on page 29
for program
command sequence.
相關(guān)PDF資料 |
PDF描述 |
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| Am29LV320DB90 | 32 Megabit (4 M x 8-Bit/2 M x 16-Bit) CMOS 3.0 Volt-only, Boot Sector Flash Memory |
| AM29LV320DB90R | 32 Megabit (4 M x 8-Bit/2 M x 16-Bit) CMOS 3.0 Volt-only, Boot Sector Flash Memory |
| AM29LV320DT120 | 32 Megabit (4 M x 8-Bit/2 M x 16-Bit) CMOS 3.0 Volt-only, Boot Sector Flash Memory |
| AM29LV320DT90R | 32 Megabit (4 M x 8-Bit/2 M x 16-Bit) CMOS 3.0 Volt-only, Boot Sector Flash Memory |
| Am29LV320DT90 | 32 Megabit (4 M x 8-Bit/2 M x 16-Bit) CMOS 3.0 Volt-only, Boot Sector Flash Memory |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AM29LV320DB120EI | 制造商:Spansion 功能描述:Flash Mem Parallel 3V/3.3V 32M-Bit 4M x 8/2M x 16 120ns 48-Pin TSOP |
| AM29LV320DB120WMI | 制造商:Spansion 功能描述:Flash Mem Parallel 3V/3.3V 32M-Bit 4M x 8/2M x 16 120ns 48-Pin FBGA |
| AM29LV320DB90EC | 制造商:Spansion 功能描述:Flash Mem Parallel 3V/3.3V 32M-Bit 4M x 8/2M x 16 90ns 48-Pin TSOP |
| AM29LV320DB90ED | 制造商:Spansion 功能描述:Flash Mem Parallel 3V/3.3V 32M-Bit 4M x 8/2M x 16 90ns 48-Pin TSOP |
| AM29LV320DB90EF | 制造商:Spansion 功能描述:Flash Mem Parallel 3V/3.3V 32M-Bit 4M x 8/2M x 16 90ns 48-Pin TSOP |
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