參數(shù)資料
型號(hào)： AM79C960KC
廠商： ADVANCED MICRO DEVICES INC
元件分類(lèi)： 微控制器/微處理器
英文描述： PCnetTM-ISA Single-Chip Ethernet Controller
中文描述： 2 CHANNEL(S), 10M bps, LOCAL AREA NETWORK CONTROLLER, PQFP120
封裝： CARRIER RING, PLASTIC, QFP-120
文件頁(yè)數(shù)： 46/127頁(yè)
文件大小： 814K
代理商： AM79C960KC
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P R E L I M I N A R Y
AMD
1-388
Am79C960
General Purpose Serial Interface (GPSI)
The PCnet-ISA controller contains a General Purpose
Serial Interface (GPSI) designed for testing the digital
portions of the chip. The MENDEC, AUI, and twisted
pair interface are by-passed once the device is set up in
the special “test mode” for accessing the GPSI func-
tions. Although this access is intended only for testing
the device, some users may find the non-encoded data
functions useful in some special applications. Note,
however, that the GPSI functions can be accessed only
when the PCnet-ISA devices operate as a bus master.
The PCnet-ISA GPSI signals are consistent with the
LANCE digital serial interface. Since the GPSI functions
can be accessed only through a special test mode, ex-
pect some loss of functionality to the device when the
GPSI is invoked. The AUI and 10BASE-T analog inter-
faces are disabled along with the internal MENDEC
logic. The LA (unlatched address) pins are removed and
become the GPSI signals, therefore, only 20 bits of ad-
dress space is available. The table below shows the
GPSI pin configuration:
To invoke the GPSI signals, follow the procedure below:
1. After reset or I/O read of Reset Address, write 10b
to PORTSEL bits in CSR15.
2. Set the ENTST bit in CSR4
3. Set the GPSIEN bit in CSR124 (see note below)
(The pins LA17–LA23 will change function after the
completion of the above three steps.)
4. Clear the ENTST bit in CSR4
5. Clear both media select bits in ISACSR2
6. Define the PORTSEL bits in the MODE register
(CSR15) to be 10b to define GPSI port. The
MODE register image is in the initialization block.
Note:
LA pins will be tristated before writing to
CORETST bit. After writing to GPSIEN, LA[17–21] will
be inputs, LA[22–23] will be outputs.
Table: GPSI Pin Configurations
LANCE/
C-LANCE
GPSI Pin
PCnet-ISA
GPSI
Pin Function
PCnet-ISA
Pin
Number
GPSI
Function
GPSI
I/O Type
PCnet-ISA Normal
Pin Function
Receive Data
I
RX
RXDAT
5
LA17
Receive Clock
I
RCLK
SRDCLK
6
LA18
Receive Carrier Sense
I
RENA
RXCRS
7
LA19
Collision
I
CLSN
CLSN
9
LA20
Transmit Clock
I
TCLK
STDCLK
10
LA21
Transmit Enable
O
TENA
TXEN
11
LA22
Transmit Data
O
TX
TXDAT
12
LA23
Note:
The GPSI function is only available in the Bus Master mode of operation.
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