參數(shù)資料
型號(hào)： AM79C973
廠商： Advanced Micro Devices, Inc.
英文描述： PCnet⑩-FAST III Single-Chip 10/100 Mbps PCI Ethernet Controller with Integrated PHY
中文描述： PCnet⑩快速三單芯片10/100 Mbps的PCI以太網(wǎng)控制器集成PHY
文件頁(yè)數(shù)： 150/304頁(yè)
文件大?。?/td> 2092K
代理商： AM79C973
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150
Am79C973/Am79C975
P R E L I M I N A R Y
by H_RESET, S_RESET, or
STOP.
CSR80: DMA Transfer Counter and FIFO Threshold
Control
Bit
Name
Description
31-16 RES
Reserved locations. Written as
zeros and read as undefined.
15-14 RES
Reserved locations. Written as
zeros and read as undefined.
13-12 RCVFW[1:0] Receive
FIFO
Watermark.
RCVFW controls the point at
which receive DMA is requested
in relation to the number of re-
ceived bytes in the Receive FIFO.
RCVFW specifies the number of
bytes which must be present
(once the frame has been verified
as a non-runt) before receive
DMA is requested. Note however
that, if the network interface is op-
erating in half-duplex mode, in or-
der for receive DMA to be
performed for a new frame, at
least 64 bytes must have been re-
ceived. This effectively avoids
having to react to receive frames
which are runts or suffer a colli-
sion during the slot time (512 bit
times). If the Runt Packet Accept
feature is enabled or if the net-
work interface is operating in full-
duplex mode, receive DMA will
be requested as soon as either
the RCVFW threshold is reached,
or a complete valid receive frame
is detected (regardless of length).
When the FDRPAD (BCR9, bit 2)
is set and the Am79C973/
Am79C975 controller is in full-du-
plex mode, in order for receive
DMA to be performed for a new
frame, at least 64 bytes must
have been received. This effec-
tively disables the runt packet ac-
cept feature in full duplex.
When operating in the NO-SRAM
mode (no SRAM enabled), the
Bus Receive FIFO and the MAC
Receive operate like a single
FIFO and the watermark value
selected by RCVFW[1:0] sets the
number of bytes that must be
present in the FIFO before re-
ceive DMA is requested.
When operating with the SRAM,
the Bus Receive FIFO, and the
MAC Receive FIFO operate inde-
pendently on the bus side and
MAC side of the SRAM, respec-
tively. In this case, the watermark
value set by RCVFW[1:0] sets the
number of bytes that must be
present in the Bus Receive FIFO
only. See Table 26.
Table 26. Receive Watermark Programming
Read/Write accessible only when
either the STOP or the SPND bit
is set. RCVFW[1:0] is set to a val-
ue of 01b (64 bytes) after
H_RESET or S_RESET and is
unaffected by STOP.
11-10 XMTSP[1:0] Transmit Start Point. XMTSP
controls the point at which pream-
ble transmission attempts to com-
mence in relation to the number
of bytes written to the MAC
Transmit FIFO for the current
transmit frame. When the entire
frame is in the MAC Transmit
FIFO, transmission will start re-
gardless of the value in XMTSP.
If the network interface is operat-
ing in half-duplex mode, regard-
less of XMTSP, the FIFO will not
internally overwrite its data until
at least 64 bytes (or the entire
frame if shorter than 64 bytes)
have been transmitted onto the
network. This ensures that for
collisions within the slot time win-
dow, transmit data need not be
rewritten to the Transmit FIFO,
and retries will be handled auton-
omously by the MAC. If the Dis-
able Retry feature is enabled, or if
the network is operating in full-du-
plex mode, the Am79C973/
Am79C975 controller can over-
write the beginning of the frame
as soon as the data is transmit-
RCVFW[1:0]
00
01
10
11
Bytes Received
16
64
112
Reserved
相關(guān)PDF資料
PDF描述
AM79C973KCW PCnet⑩-FAST III Single-Chip 10/100 Mbps PCI Ethernet Controller with Integrated PHY
AM79C975KCW PCnet⑩-FAST III Single-Chip 10/100 Mbps PCI Ethernet Controller with Integrated PHY
AM79C973VCW PCnet⑩-FAST III Single-Chip 10/100 Mbps PCI Ethernet Controller with Integrated PHY
AM79C975VCW PCnet⑩-FAST III Single-Chip 10/100 Mbps PCI Ethernet Controller with Integrated PHY
AM79C976 PCnet-PRO⑩ 10/100 Mbps PCI Ethernet Controller
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
AM79C973/75 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:Board Layout Considerations for the Am79C973/75 Network Interface? - (PDF)
AM79C973/AM79C975 制造商:AMD 制造商全稱(chēng):Advanced Micro Devices 功能描述:Am79C973/Am79C975 - PCnet-FAST III Single-Chip 10/100 Mbps PCI Ethernet Controller with Integrated PHY
AM79C973AVC\\W 制造商:Advanced Micro Devices 功能描述:
AM79C973AVC\W 制造商:Advanced Micro Devices 功能描述:
AM79C973BKC 制造商:Advanced Micro Devices 功能描述:79C973BKC
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