參數(shù)資料
型號: AMC1210IRHAT
英文描述: Quad Digital Filter for 2nd-Order Delta-Sigma Modulator
中文描述: 四數(shù)字濾波器2階Δ-Σ調(diào)制器
文件頁數(shù): 12/47頁
文件大?。?/td> 805K
代理商: AMC1210IRHAT
www.ti.com
THEORY OF OPERATION
Interface Module
The AMC1210 can communicate with digital signal processors (DSPs) or microcontrollers (
μ
Cs) in four different
interface modes: one serial mode and three 8-bit, multiplexed parallel modes. The serial mode is a standard SPI
mode, normally with a 24-bit transfer. The multiplexed parallel modes are designed to work together with a wide
range of controllers. Mode pins M0 and M1 determine the mode selection.
Table 2
shows the digital interface
configuration.
AMC1210
SBAS372A–APRIL 2006–REVISED OCTOBER 2006
Overview
The AMC1210 is a flexible digital filter device specifically designed for motor control applications. It incorporates
four independent digital filters into a digital processing block, allowing communication via SPI bus or 8-bit,
multiplexed parallel I/O. Each datastream input can be clocked in using an external clock or a clock provided by
a delta-sigma modulator. A time measurement unit allows software monitoring of the sample speed and data
acquisition, and a comprehensive control and interrupt unit allows real-time monitoring of the AMC1210 status. A
digital comparator unit is provided to alert programmable peak conditions on the different datastreams. When
used in current measurement applications, the digital comparator unit can alert a system to over- or
under-current situations.
Table 2. Digital Interface Configuration
INTERFACE MODES
SPI
Parallel Mode 1
Parallel Mode 2
Parallel Mode 3
PIN M1
0
0
1
1
PIN M0
0
1
0
1
The digital interface pins perform different functions depending on the interface mode.
Table 3
shows the pin
operations in different modes.
Table 3. Pin Functions in Different Communication Modes
PIN
M1
M0
ALE
CS
RD
WR
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
SPI MODE
0
0
Frame sync
SPI Data In
SPI Clock
SPI Data Out
PARALLEL MODE 1
0
1
Address/Data Select
Chip Select
Read
Write
Databus 0 (LSB)
Databus 1
Databus 2
Databus 3
Databus 4
Databus 5
Databus 6
Databus 7 (MSB)
PARALLEL MODE 2
1
0
Address Latch Enable
Chip Select
Read
Write
Databus 0 (LSB)
Databus 1
Databus 2
Databus 3
Databus 4
Databus 5
Databus 6
Databus 7 (MSB)
PARALLEL MODE 3
1
1
Address Valid
Chip Select
Strobe
Read/Write
Databus 0 (LSB)
Databus 1
Databus 2
Databus 3
Databus 4
Databus 5
Databus 6
Databus 7 (MSB)
12
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