
AN10E40 Data Manual
13
Micro Mode Configuration Sequence
Micro Mode Maximum Data Transfer Rate
The maximum Micro Mode data transfer rate is governed by the Read and Write timing diagrams shown above.
The host processor must only write data when BUSY is inactive. BUSY is only asserted when data cannot be
accepted at the maximum rate. The host processor can either monitor the device’s BUSY output, or read the Status
Register. If processor R/W cycles are faster than the timing shown, then external circuitry must be used to insert
wait states.
A
sequence
assertion of device reset. This can be
accomplished by either asserting
RESETb or by writing the reset
command into the function register.
Micro
Mode
typically
configuration
begins
with
After the reset sequence completes,
you have the option to specifically
address a single configuration row at
a time, but a more typical scenario
would be to instead write the Load
Configuration command into the
function register.
At this point, the device is expecting
that a complete configuration image
will be written to the data port
(RS=1). Simplistic software might
check for device busy after every
byte write. Device busy will assert
once a long internal shift register has
been
filled,
and
configuration engine is moving the
contents of the register into a single
row of configuration SRAM.
the
internal
After the final row is loaded, re-
enable the bootstrap voltage and the
analog by writing 0x10 to the function
register.
It is possible to go in and uniquely
address
specific
configuration SRAM. The details of
partial on-the-fly reconfiguration may
be covered in a separate application
note.
rows
of
the
Monitor BUSY
Detect BUSY
line or read
device status
register (RS=1).
Reset Device
Assert RESETb or write
r e s e t c o m m a n d t o
function register (RS=0).
Write Load Configuration
Write load configuration
command to function
register (RS=0).
BUSY
Detect BUSY
line or read
device status
register (RS=1).
Monitor Status
Read device
status register
(RS=1).
Last Data
Has a complete
configuration
f i l e b e e n
written
Write Data Byte
Write next configuration
data byte to the data
register (RS=1).
Enable Analog
Write 0x10 to function
register (RS=0).
Error
No
Yes
Yes
Stop
No
BUSY
Finished