參數(shù)資料
型號(hào)： AT80C51RD2-SLSUM
廠商： Atmel
文件頁(yè)數(shù)： 57/81頁(yè)
文件大?。?/td> 0K
描述： IC 8051 MCU 5V SPI 20MHZ 44-PLCC
標(biāo)準(zhǔn)包裝： 972
系列： 80C
核心處理器： 8051
芯體尺寸： 8-位
速度： 40MHz
連通性： UART/USART
外圍設(shè)備： POR，PWM，WDT
輸入/輸出數(shù)： 32
程序存儲(chǔ)器類型： ROMless
RAM 容量： 1K x 8
電壓 - 電源 (Vcc/Vdd)： 4.5 V ~ 5.5 V
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 85°C
封裝/外殼： 44-PLCC
包裝： 管件
60
4113D–8051–01/09
AT80C51RD2
16. Power-off Flag
The Power-off flag allows the user to distinguish between a “cold start” reset and a “warm start”
reset.
A cold start reset is the one induced by V
CC switch-on. A warm start reset occurs while VCC is still
applied to the device and could be generated for example by an exit from power-down.
The Power-off flag (POF) is located in PCON register (Table 16-1). POF is set by hardware
when V
CC rises from 0 to its nominal voltage. The POF can be set or cleared by software allow-
ing the user to determine the type of reset.
Table 16-1.
PCON Register
PCON - Power Control Register (87h)
Reset Value = 00X1 0000b
Not bit addressable
76
543
210
SMOD1
SMOD0
-
POF
GF1
GF0
PD
IDL
Bit
Number
Bit
Mnemonic
Description
7SMOD1
Serial port Mode bit 1
Set to select double baud rate in mode 1, 2 or 3.
6SMOD0
Serial port Mode bit 0
Cleared to select SM0 bit in SCON register.
Set to select FE bit in SCON register.
5-
Reserved
The value read from this bit is indeterminate. Do not set this bit.
4POF
Power-off Flag
Cleared to recognize next reset type.
Set by hardware when V
CC rises from 0 to its nominal voltage. Can also be set by
software.
3GF1
General purpose Flag
Cleared by user for general purpose usage.
Set by user for general purpose usage.
2GF0
General purpose Flag
Cleared by user for general purpose usage.
Set by user for general purpose usage.
1PD
Power-down mode bit
Cleared by hardware when reset occurs.
Set to enter power-down mode.
0IDL
Idle mode bit
Cleared by hardware when interrupt or reset occurs.
Set to enter idle mode.
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