參數(shù)資料
型號(hào): AT91M55800A-33CJ SL383
廠商: Atmel
文件頁數(shù): 3/28頁
文件大小: 0K
描述: IC ARM MCU 16BIT 176BGA
標(biāo)準(zhǔn)包裝: 1,000
系列: AT91
核心處理器: ARM7
芯體尺寸: 16/32-位
速度: 33MHz
連通性: EBI/EMI,SPI,UART/USART
外圍設(shè)備: POR,WDT
輸入/輸出數(shù): 58
程序存儲(chǔ)器類型: ROMless
RAM 容量: 8K x 8
電壓 - 電源 (Vcc/Vdd): 2.7 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 8x10b; D/A 2x10b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 176-LFBGA
包裝: 帶卷 (TR)
配用: AT91EB55-ND - KIT EVAL FOR ARM AT91M55800A
其它名稱: AT91M55800A33CJSL
11
1745FS–ATARM–18-Apr-06
AT91M55800A Summary
The Real-time Clock (RTC) peripheral is designed for very low power consumption, and com-
bines a complete time-of-day clock with alarm and a two-hundred year Gregorian calendar,
complemented by a programmable periodic interrupt.
The Parallel Input/Output Controllers (PIOA and PIOB) control the 58 I/O lines. They enable
the user to select specific pins for on-chip peripheral input/output functions, and general-pur-
pose input/output signal pins. The PIO controllers can be programmed to detect an interrupt
on a signal change from each line.
The Watchdog (WD) can be used to prevent system lock-up if the software becomes trapped
in a deadlock.
The Special Function (SF) module integrates the Chip ID and Reset Status registers.
5.2.2
User Peripherals
Three USARTs, independently configurable, enable communication at a high baud rate in syn-
chronous or asynchronous mode. The format includes start, stop and parity bits and up to 8
data bits. Each USART also features a Timeout and a Time Guard Register, facilitating the
use of the two dedicated Peripheral Data Controller (PDC) channels.
The six 16-bit Timer/Counters (TC) are highly programmable and support capture or waveform
modes. Each TC channel can be programmed to measure or generate different kinds of
waves, and can detect and control two input/output signals. Each TC also has three external
clock signals.
The SPI provides communication with external devices in master or slave mode. It has four
external chip selects which can be connected to up to 15 devices. The data length is program-
mable, from 8- to 16-bit.
The two identical 4-channel 10-bit analog-to-digital converters (ADC) are based on a Succes-
sive Approximation Register (SAR) approach.
The two identical single-channel 10-bit digital-to-analog converters (DAC).
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