參數(shù)資料
型號: AT91M55800A-33CJ SL383
廠商: Atmel
文件頁數(shù): 5/28頁
文件大?。?/td> 0K
描述: IC ARM MCU 16BIT 176BGA
標準包裝: 1,000
系列: AT91
核心處理器: ARM7
芯體尺寸: 16/32-位
速度: 33MHz
連通性: EBI/EMI,SPI,UART/USART
外圍設(shè)備: POR,WDT
輸入/輸出數(shù): 58
程序存儲器類型: ROMless
RAM 容量: 8K x 8
電壓 - 電源 (Vcc/Vdd): 2.7 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 8x10b; D/A 2x10b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 176-LFBGA
包裝: 帶卷 (TR)
配用: AT91EB55-ND - KIT EVAL FOR ARM AT91M55800A
其它名稱: AT91M55800A33CJSL
13
1745FS–ATARM–18-Apr-06
AT91M55800A Summary
7.
Product Overview
7.1
Power Supplies
The AT91M55800A has 5 kinds of power supply pins:
VDDCORE pins, which power the chip core
VDDIO pins, which power the I/O Lines
VDDPLL pins, which power the oscillator and PLL cells
VDDA pins, which power the analog peripherals ADC and DAC
VDDBU pins, which power the RTC, the 32768 Hz oscillator and the Shut-down Logic of
the APMC
VDDIO and VDDCORE are separated to permit the I/O lines to be powered with 5V, thus
resulting in full TTL compliance.
The following ground pins are provided:
GND for both VDDCORE and VDDIO
GNDPLL for VDDPLL
GNDA for VDDA
GNDBU for VDDBU
All of these ground pins must be connected to the same voltage (generally the board electric
ground) with wires as short as possible. GNDPLL, GNDA and GNDBU are provided sepa-
rately in order to allow the user to add a decoupling capacitor directly between the power and
ground pads. In the same way, the PLL filter resistor and capacitors must be connected to the
device and to GNDBU with wires as short as possible. Also, the external load capacitances of
the main oscillator crystal and the 32768 Hz crystal must be connected respectively to GND-
PLL and to GNDBU with wires as short as possible.
The main constraints applying to the different voltages of the device are:
VDDBU must be lower than or equal to VDDCORE
VDDA must be higher than or equal to VDDCORE
VDDCORE must be lower than or equal to VDDIO
The nominal power combinations supported by the AT91M55800A are described in the follow-
ing table:
7.2
Input/Output Considerations
After the reset, the peripheral I/Os are initialized as inputs to provide the user with maximum
flexibility. It is recommended that in any application phase, the inputs to the AT91M55800A
microcontroller be held at valid logic levels to minimize the power consumption.
Table 7-1.
Nominal Power Combinations
VDDIO
VDDCORE
VDDA
VDDPLL
VDDBU
Maximum Operating
Frequency
3V
33 MHz
3.3V
33 MHz
5V
3.3V
33 MHz
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