參數(shù)資料
型號: ATTINY13V-10SSUR
廠商: Atmel
文件頁數(shù): 18/176頁
文件大?。?/td> 0K
描述: MCU AVR 1KB FLASH 10MHZ 8SOIC
產(chǎn)品培訓(xùn)模塊: tinyAVR Introduction
標(biāo)準(zhǔn)包裝: 4,000
系列: AVR® ATtiny
核心處理器: AVR
芯體尺寸: 8-位
速度: 10MHz
外圍設(shè)備: 欠壓檢測/復(fù)位,POR,PWM,WDT
輸入/輸出數(shù): 6
程序存儲器容量: 1KB(512 x 16)
程序存儲器類型: 閃存
EEPROM 大?。?/td> 64 x 8
RAM 容量: 64 x 8
電壓 - 電源 (Vcc/Vdd): 1.8 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 4x10b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 8-SOIC(0.154",3.90mm 寬)
包裝: 帶卷 (TR)
其它名稱: ATTINY13V-10SSUR-ND
ATTINY13V-10SSURTR
PIC16(L)F720/721
DS41430C-page 114
Preliminary
2010-2011 Microchip Technology Inc.
15.3
PWM Mode
The PWM mode generates a Pulse-Width Modulated
signal on the CCP1 pin. The duty cycle, period and
resolution are determined by the following registers:
PR2
T2CON
CCPR1L
CCP1CON
In Pulse-Width Modulation (PWM) mode, the CCP
module produces up to a 10-bit resolution PWM output
on the CCP1 pin.
Figure 15-3 shows a simplified block diagram of PWM
operation.
Figure 15-4 shows a typical waveform of the PWM
signal.
For a step-by-step procedure on how to set up the CCP
module for PWM operation, refer to Section 15.3.8
FIGURE 15-3:
SIMPLIFIED PWM BLOCK
DIAGRAM
The PWM output (Figure 15-4) has a time base
(period) and a time that the output stays high (duty
cycle).
FIGURE 15-4:
CCP PWM OUTPUT
15.3.1
CCPX PIN CONFIGURATION
In PWM mode, the CCP1 pin is multiplexed with the
PORT data latch. The user must configure the CCP1
pin as an output by clearing the associated TRIS bit.
CCPR1L
CCPR1H(2) (Slave)
Comparator
TMR2
PR2
(1)
RQ
S
Duty Cycle Registers
CCP1CON<5:4>
Clear Timer2,
toggle CCP1 pin and
latch duty cycle
Note
1:
The 8-bit timer TMR2 register is concatenated with
the 2-bit internal system clock (FOSC), or 2 bits of the
prescaler, to create the 10-bit time base.
2:
In PWM mode, CCPR1H is a read-only register.
TRIS
CCP1
Comparator
Note:
Clearing the CCP1CON register will
relinquish CCP1 control of the CCP1 pin.
Period
Pulse Width
TMR2 = 0
TMR2 = CCPR1L:CCP1CON<5:4>
TMR2 = PR2
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