參數(shù)資料
型號: ATTINY13V-10SSUR
廠商: Atmel
文件頁數(shù): 96/176頁
文件大?。?/td> 0K
描述: MCU AVR 1KB FLASH 10MHZ 8SOIC
產(chǎn)品培訓(xùn)模塊: tinyAVR Introduction
標(biāo)準(zhǔn)包裝: 4,000
系列: AVR® ATtiny
核心處理器: AVR
芯體尺寸: 8-位
速度: 10MHz
外圍設(shè)備: 欠壓檢測/復(fù)位,POR,PWM,WDT
輸入/輸出數(shù): 6
程序存儲器容量: 1KB(512 x 16)
程序存儲器類型: 閃存
EEPROM 大?。?/td> 64 x 8
RAM 容量: 64 x 8
電壓 - 電源 (Vcc/Vdd): 1.8 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 4x10b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 8-SOIC(0.154",3.90mm 寬)
包裝: 帶卷 (TR)
其它名稱: ATTINY13V-10SSUR-ND
ATTINY13V-10SSURTR
26
2535J–AVR–08/10
ATtiny13
When this Oscillator is selected, start-up times are determined by the SUT fuses as shown in
Note:
1. The device is shipped with this option selected.
6.2.3
Internal 128 kHz Oscillator
The 128 kHz internal Oscillator is a low power Oscillator providing a clock of 128 kHz. The fre-
quency depends on supply voltage, temperature and batch variations. This clock may be select
as the system clock by programming the CKSEL fuses to “11”.
When this clock source is selected, start-up times are determined by the SUT fuses as shown in
6.2.4
Default Clock Source
The device is shipped with CKSEL = “10”, SUT = “10”, and CKDIV8 programmed. The default
clock source setting is therefore the Internal RC Oscillator running at 9.6 MHz with longest start-
up time and an initial system clock prescaling of 8. This default setting ensures that all users can
make their desired clock source setting using an In-System or High-voltage Programmer.
6.3
System Clock Prescaler
The ATtiny13 system clock can be divided by setting the “CLKPR – Clock Prescale Register” on
page 28. This feature can be used to decrease power consumption when the requirement for
processing power is low. This can be used with all clock source options, and it will affect the
clock frequency of the CPU and all synchronous peripherals. clkI/O, clkADC, clkCPU, and clkFLASH
are divided by a factor as shown in Table 6-8 on page 28.
6.3.1
Switching Time
When switching between prescaler settings, the System Clock Prescaler ensures that no
glitches occur in the clock system and that no intermediate frequency is higher than neither the
clock frequency corresponding to the previous setting, nor the clock frequency corresponding to
the new setting.
Table 6-5.
Start-up Times for the Internal Calibrated RC Oscillator Clock Selection
SUT1..0
Start-up Time
from Power-down
Additional Delay from
Reset (VCC = 5.0V)
Recommended Usage
00
6 CK
14CK
BOD enabled
01
6 CK
14CK + 4 ms
Fast rising power
6 CK
14CK + 64 ms
Slowly rising power
11
Reserved
Table 6-6.
Start-up Times for the 128 kHz Internal Oscillator
SUT1:0
Start-up Time from
Power-down and Power-save
Additional Delay
from Reset
Recommended
Usage
00
6 CK
14CK
BOD enabled
01
6 CK
14CK + 4 ms
Fast rising power
10
6 CK
14CK + 64 ms
Slowly rising power
11
Reserved
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