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C161U
Real Time Clock (RTC)
Data Sheet
295
2001-04-19
counting clock by factor 8. Activating the prescaler reduces the resolution of the reload
counter T14. If the prescaler is not activated, the RTC may be lose counting clocks on
switching from asynchronous to synchronous mode and back. This effect can be avoided
by activating the prescaler.
Setting the bits T14DEC or T14INC decrements or increments the T14 timer with the
next count event. If at the next count event a reload has to be executed, then an
increment operation is delayed until the next count event occurs. The in/decrement
function can only be used if register T14REL is not equal to FFFF
H
. These bits are
cleared by hardware after the decrement/increment operation.
13.2.3
System Clock Operation
A real time system clock can be maintained that represents the current time and date. If
the RTC module is not effected by a system reset, it keeps running also during idle mode
and power down mode.
The maximum resolution (minimum stepwidth) for this clock information is determined by
timer T14’s input clock. The maximum usable timespan is achieved when T14REL is
loaded with 0000
H
and so T14 divides by 2
16
.
13.2.4
Cyclic Interrupt Generation
RTC module can generate an interrupt request RTC_T14INT whenever timer T14
overflows and is reloaded. This interrupt request may eg. be used to provide a system
time tick independent of the CPU clock frequency without loading the general purpose
timers, or to wake up regularly from idle mode. The T14 overflow interrupt
(RTC_T14INT) cycle time can be adjusted via the timer T14 reload register T14REL.
This interrupt request is also ored with all other interrupts of the RTC via the RTC
interrupt sub node RTCISN.
13.2.5
Alarm Interrupt Generation
RTC module can also provide an alarm interrupt. For an easier programming of this
interrupt, the RTCL and RTCH timer can be divided into smaller reloadable timers. Each
sub-timer can be programmed for an overflow on different time bases (e.g. second, hour,
minute, day). With each timer overflow a RTC interrupt is generated. All these RTC
interrupts are ored via the interrupt sub node RTCISNC to one interrupt request
RTC_INT. Additionally the RTC_T14INT is connected to this interrupt sub node.
13.2.6
48-bit Timer Operation
The concatenation of the 16-bit reload timer T14 and the 32-bit RTC timer can be
regarded as a 48-bit timer which counts with the RTC count input frequency
(RTC_REF_CLK) divided by the fixed prescaler, if the prescaler is selected. The reload
registers T14REL, RTCRELL and RTCRELH should be cleared to get a 48-bit binary