參數(shù)資料
型號(hào)： C5NPD0-DS
英文描述： QUAD BILATERAL SWITCH FOR TRANSMISSION OR MULTIPLEXING OF ANALOG OR DIGITAL SIGNALS
中文描述： 的C - 5網(wǎng)絡(luò)處理器的數(shù)據(jù)資料硅修訂D0
文件頁(yè)數(shù)： 37/100頁(yè)
文件大?。?/td> 2163K
代理商： C5NPD0-DS
Pin Descriptions Grouped by Function
37
MOTOROLA GENERAL BUSINESS INFORMATION
C5NPD0-DS/D REV 04
SONET OC-3 Transceiver Interface Configuration
Table 12
describes the SONET Optical Carrier (OC) 3 transceiver interface signals. For each
CP (0-15), you can implement a single OC-3 interface.
SONET OC-12 Transceiver Interface Configuration
SONET Optical Carrier (OC) 12 is implemented by using one cluster of CPs. At any time, a
CP within a cluster spends half its time performing receive functions, and the other half
performing transmit functions.
Table 13
shows a CP Cluster configured for one OC-12
interface.
CP
n+3
_2
Table 6
1
LVTTL
I
RXD(5)
Receive Data
CP
n+3
_3
Table 6
1
LVTTL
I
RXD(4)
Receive Data
CP
n+3
_4
Table 6
1
LVTTL
I
RXD(3)
Receive Data
CP
n+3
_5
Table 6
1
LVTTL
I
RXD(2)
Receive Data
CP
n+3
_6
Table 6
1
LVTTL
I
RXD(0)
Receive Data (ten bits wide, first on wire)
TOTAL PINS
28
*
n can be 0, 4, 8, or 12
Reference
Table 6
for pin numbers for the actual cluster(s) you are configuring.
Table 11
Gigabit Ethernet and Fibre Channel TBI Signals Example (continued)
SIGNAL NAME*
PIN #
TOTAL
TYPE
I/O
LABEL
SIGNAL DESCRIPTION
Table 12
OC-3 Signals
SIGNAL NAME*
PIN #
TOTAL
TYPE
I/O
LABEL
SIGNAL DESCRIPTION
CP
n
_0
Table 6
1
LVPECL
I
RCLK_H
Receive Clock noninverted side of pair (155.52MHz)
CP
n
_1
Table 6
1
LVPECL
I
RCLK_L
Receive Clock inverted side of pair (155.52MHz)
CP
n
_2
Table 6
1
LVPECL
O
TXD_H
Transmit Data noninverted side of pair
CP
n
_3
Table 6
1
LVPECL
O
TXD_L
Transmit Data inverted side of pair
CP
n
_4
Table 6
1
LVPECL
I
RXD_H
Receive Data noninverted side of pair
CP
n
_5
Table 6
1
LVPECL
I
RXD_L
Receive Data inverted side of pair
CP
n
_6
Table 6
1
LVPECL
I
SIGNAL_DET
A light level above a certain threshold is present at the optical
receiver - single ended LVPECL.
TOTAL PINS
7
*
n
can be from 0 to 15.
Reference
Table 6
for pin numbers for the actual cluster(s) you are configuring.
F
n
.
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