- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄374135 > C5NPD0-DS QUAD BILATERAL SWITCH FOR TRANSMISSION OR MULTIPLEXING OF ANALOG OR DIGITAL SIGNALS PDF資料下載
參數(shù)資料
| 型號： | C5NPD0-DS |
| 英文描述： | QUAD BILATERAL SWITCH FOR TRANSMISSION OR MULTIPLEXING OF ANALOG OR DIGITAL SIGNALS |
| 中文描述： | 的C - 5網(wǎng)絡處理器的數(shù)據(jù)資料硅修訂D0 |
| 文件頁數(shù)： | 48/100頁 |
| 文件大?。?/td> | 2163K |
| 代理商： | C5NPD0-DS |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁當前第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁
48
CHAPTER 2: SIGNAL DESCRIPTIONS
C5NPD0-DS/D REV 04
MOTOROLA GENERAL BUSINESS INFORMATION
MA0 - MA11
H22, I22, H23, H24, I24, H25, H26,
I26, H27, H28, I28, H29
12
LVTTL
O
Address Outputs: A0-A11 are sampled during the
ACTIVE command and READ/WRITE to select one
location out of the memory array in the respective
bank. The address inputs also provide the
op-code during a LOAD MODE REGISTER
command
MBA0 - MBA1
G18, H19
2
LVTTL
O
Bank Address Outputs: BA0 and BA1 define which
bank the ACTIVE, READ, WRITE or PRECHARGE
command is being applied
MCLK
I16
1
nc
nc
Reserved
MCASX
J21
1
LVTTL
O
Command Outputs: MRASX, MCASX, MWEX and
MCSX define the command being entered.
NOTE:
MCSX is considered part of the command
code.
MRASX
I20
1
LVTTL
O
Command Outputs: MRASX, MCASX, MWEX and
MCSX define the command being entered. MCSX
is considered part of the command code.
MWEX
J20
1
LVTTL
O
Command Outputs: MRASX, MCASX, MWEX and
MCSX define the command being entered. MCSX
is considered part of the command code.
MCSX
H20
1
LVTTL
O
Chip Select: MCSX enables (registered LOW) and
disables (registered HIGH) the command decoder.
All commands are masked when MCSX is
registered HIGH. MCSX provides the external bank
selection on systems with multiple banks. MCSX is
considered part of the command code.
MDQM
MDQML
H21
G14
1
1
LVTTL
LVTTL
O
O
Input/Output Mask: MDQM is an input mask
signal for write accesses and an output enable
signal for read accesses. Input data is masked
when MDQM is sampled HIGH during a WRITE
cycle. The output buffers are placed in a high Z
state (two-clock latency) when MDQM is sampled
HIGH during the READ cycle.
NOTE: MDQML is an identical copy of MDQM
used to drive the loading on SDRAM
configurations with 2 DQM pins.
Table 23
BMU SDRAM Interface Signals (continued)
SIGNAL NAME
PIN #
TOTAL
TYPE
I/O
SIGNAL DESCRIPTION
F
n
.
相關PDF資料 |
PDF描述 |
|---|---|
| C60-20 | QUAD 2-input NAND Schmidt trigger |
| C60-30 | 8-STAGE SHIFT-AND-STORE BUS REGISTER |
| C60-40 | 8-STAGE SHIFT-AND-STORE BUS REGISTER |
| C6001 | TRIPLE 3 INPUTAND GATES |
| C6006AZ | 4 BIT D TYPE REGISTERS |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| C5NP-PB | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:C-5 Network Processor Fact Sheet |
| C5P-0 | 制造商:Wieland Electric Inc 功能描述: |
| C5P0108N-R10 | 制造商:ELECTROSWITCH ELECTRONIC PRODUCTS 功能描述: |
| C5P0112N-A | 功能描述:旋鈕開關 02-12POS/1P/1SECTION RoHS:否 制造商:C&K Components 位置數(shù)量:5 卡片組數(shù)量: 每卡片組極數(shù):2 電流額定值:250 mA 電壓額定值:125 V 指數(shù)角: 觸點類型: 觸點形式:DPST 端接類型:Solder 安裝類型:Panel 觸點電鍍:Silver |
| C5P0112N-RA | 功能描述:SWITCH ROTARY SP-12POS ENCLOSED RoHS:是 類別:開關 >> 旋轉 系列:C5 RoHS指令信息:435123-1 Statement of Compliance 產(chǎn)品目錄繪圖:Rotary Switch 特色產(chǎn)品:TE Connectivity Switches 3D 型號:435123-1.pdf 標準包裝:1 系列:6000 位置數(shù):10 層數(shù):1 每層電極數(shù):- 每層電路:BCD 觸點額定電壓:0.125A @ 115VAC 觸動器類型:旋鈕 安裝類型:PCB，通孔 端接類型:PC 引腳 方向:垂直 擺角:36° 產(chǎn)品目錄頁面:2570 (CN2011-ZH PDF) 其它名稱:435123-1-ND450-1183A26201A26201-ND |
發(fā)布緊急采購，3分鐘左右您將得到回復。