參數(shù)資料
型號: C5NPD0-DS
英文描述: QUAD BILATERAL SWITCH FOR TRANSMISSION OR MULTIPLEXING OF ANALOG OR DIGITAL SIGNALS
中文描述: 的C - 5網(wǎng)絡(luò)處理器的數(shù)據(jù)資料硅修訂D0
文件頁數(shù): 72/100頁
文件大?。?/td> 2163K
代理商: C5NPD0-DS
72
CHAPTER 3: ELECTRICAL SPECIFICATIONS
C5NPD0-DS/D REV 04
MOTOROLA GENERAL BUSINESS INFORMATION
Dimensions: 100mm x 80mm x 10mm (height)
Thermal resistance heat sink to ambient (
φ
SA
) of 1.6
o
C/W @200 LFM.
Figure 10
provides the characteristic thermal resistance curve for this heat sink for various
airflow rates.
Thermal resistance case to heat sink (
φ
CS
) of 0.03
o
C/W (Chromerics T705
thermal material).
Note that target heat sink design is for low profile (10mm height) applications.
Significantly better thermal performance is possible with taller and/or wider
designs. Contact your C-Port representative for heat sink options.
3
Effective Thermal Resistance (
φ
effective
=
φ
JA
φ
JBA
/ (
φ
JA
+
φ
JBA
)) reflects the total thermal
performance of the heat sink and board, as outlined in Note 2 above.
Figure 10
Thermal Performance for C-5 Network Processor Heat Sink (see
step2
above)
AC Timing Specifications
AC timing specifications consist of input requirements and output responses. The input
requirements include setup and hold times, pulse widths, and high and low times. The
output responses include delays from clock to signal. The AC timing specifications are
defined separately for each interface to the C-5 NP
Unless otherwise noted, all AC specifications were tested within the functional operating
range.
0
200
400
600
800
1000
0
1
2
3
Velocity (ft/min)
T
Theoretical calculation of thermal resistance as a function of airflow velocity across heat sink
F
n
.
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