參數(shù)資料
型號: CDB4351
廠商: Cirrus Logic Inc
文件頁數(shù): 24/37頁
文件大?。?/td> 0K
描述: BOARD EVAL FOR CS4351 DAC
標(biāo)準(zhǔn)包裝: 1
系列: Popguard®
DAC 的數(shù)量: 2
位數(shù): 24
采樣率(每秒): 192k
數(shù)據(jù)接口: 串行
DAC 型: 電壓
工作溫度: -10°C ~ 70°C
已供物品: 板,纜線,CD
已用 IC / 零件: CS4351
產(chǎn)品目錄頁面: 757 (CN2011-ZH PDF)
相關(guān)產(chǎn)品: CS4351-DZZ-ND - IC DAC STER 112DB 192KHZ 20TSSOP
598-1055-5-ND - IC DAC STER 112DB 192KHZ 20TSSOP
其它名稱: 598-1152
30
DS566F1
CS4351
6.7.1
Power Down (PDN) Bit 7
Function:
When set to 1 (default), the entire device will enter a low-power state and the contents of the control reg-
isters will be retained. The power-down bit defaults to ‘1’ on power-up and must be disabled before normal
operation in Control Port mode can occur. This bit is ignored if CPEN is not set.
6.7.2
Control Port Enable (CPEN) Bit 6
Function:
This bit is set to 0 by default, allowing the device to power-up in Stand-Alone Mode. Control Port Mode
can be accessed by setting this bit to 1. This will allow operation of the device to be controlled by the reg-
isters and the pin definitions will conform to Control Port Mode.
6.7.3
Freeze Controls (Freeze) Bit 5
Function:
When set to 1, this function allows modifications to be made to the registers without the changes taking
effect until FREEZE is set back to 0. To make multiple changes in the Control Port registers take effect
simultaneously, enable the FREEZE bit, make all register changes, then disable the FREEZE bit.
When set to 0 (default), register changes take effect immediately.
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