參數(shù)資料
型號： CDB4351
廠商： Cirrus Logic Inc
文件頁數(shù)： 7/37頁
文件大?。?/td> 0K
描述： BOARD EVAL FOR CS4351 DAC
標(biāo)準(zhǔn)包裝： 1
系列： Popguard®
DAC 的數(shù)量： 2
位數(shù)： 24
采樣率（每秒）： 192k
數(shù)據(jù)接口： 串行
DAC 型： 電壓
工作溫度： -10°C ~ 70°C
已供物品： 板，纜線，CD
已用 IC / 零件： CS4351
產(chǎn)品目錄頁面： 757 (CN2011-ZH PDF)
相關(guān)產(chǎn)品： CS4351-DZZ-ND - IC DAC STER 112DB 192KHZ 20TSSOP
598-1055-5-ND - IC DAC STER 112DB 192KHZ 20TSSOP
其它名稱： 598-1152
DS566F1
15
CS4351
4. APPLICATIONS
4.1
Sample Rate Range/Operational Mode Detect
The device operates in one of three operational modes. The allowed sample rate range in each mode will
depend on whether the Auto-Detect Defeat bit is enabled/disabled.
4.1.1
Auto-Detect Enabled
The Auto-Detect feature is enabled by default. In this state, the CS4351 will auto-detect the correct mode
when the input sample rate (Fs), defined by the LRCK frequency, falls within one of the ranges illustrated
in Table 1. Sample rates outside the specified range for each mode are not supported.
4.1.2
Auto-Detect Disabled
The Auto-Detect feature can be defeated only by the format bits in the control port register 02h. In this
state, the CS4351 will not auto-detect the correct mode based on the input sample rate (Fs). The opera-
tional mode must then be set manually according to one of the ranges illustrated in Table 2. Please refer
to Section 6.2.3 for implementation details. Sample rates outside the specified range for each mode are
not supported. In stand-alone mode it is not possible to disable auto-detect of sample rates.
4.2
System Clocking
The device requires external generation of the master (MCLK), left/right (LRCK) and serial (SCLK) clocks.
The left/right clock, defined also as the input sample rate (Fs), must be synchronously derived from the
MCLK according to specified ratios. The specified ratios of MCLK to LRCK, along with several standard au-
dio sample rates and the required MCLK frequency, are illustrated in Tables 3 through 5.
Refer to Section 4.3 for the required SCLK timing associated with the selected Digital Interface Format and
frequencies.
Input Sample Rate (FS)MODE
4 kHz - 50 kHz
Single-Speed Mode
84 kHz - 100 kHz
Double-Speed Mode
170 kHz - 200 kHz
Quad-Speed Mode
Table 1. CS4351 Auto-Detect
FM1
FM0
Input Sample Rate (FS)MODE
0
Auto speed mode detect
Auto
0
1
4 kHz - 50 kHz
Single-Speed Mode
1
0
50 kHz - 100 kHz
Double-Speed Mode
1
100 kHz - 200 kHz
Quad-Speed Mode
Table 2. CS4351 Mode Select
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參數(shù)描述
CDB4352 功能描述:音頻 IC 開發(fā)工具 Eval Bd 192kHz DAC w/LD RoHS:否 制造商:Texas Instruments 產(chǎn)品:Evaluation Kits 類型:Audio Amplifiers 工具用于評估:TAS5614L 工作電源電壓:12 V to 38 V
CDB4353 功能描述:音頻 IC 開發(fā)工具 3.3V Str DAC w/2Vrms line out Eval Bd RoHS:否 制造商:Texas Instruments 產(chǎn)品:Evaluation Kits 類型:Audio Amplifiers 工具用于評估:TAS5614L 工作電源電壓:12 V to 38 V
CDB4354 功能描述:音頻 IC 開發(fā)工具 Eval Board 5V DAC w/ 2Vrms line driver RoHS:否 制造商:Texas Instruments 產(chǎn)品:Evaluation Kits 類型:Audio Amplifiers 工具用于評估:TAS5614L 工作電源電壓:12 V to 38 V
CDB4360 功能描述:音頻 IC 開發(fā)工具 Eval Bd 102dB 192kHz 6-Ch DAC RoHS:否 制造商:Texas Instruments 產(chǎn)品:Evaluation Kits 類型:Audio Amplifiers 工具用于評估:TAS5614L 工作電源電壓:12 V to 38 V
CDB4361 功能描述:音頻 IC 開發(fā)工具 Eval Bd 105dB 192kHz 6-Ch DAC RoHS:否 制造商:Texas Instruments 產(chǎn)品:Evaluation Kits 類型:Audio Amplifiers 工具用于評估:TAS5614L 工作電源電壓:12 V to 38 V
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