參數(shù)資料
型號(hào)： CMOD232+
廠商： Maxim Integrated Products
文件頁(yè)數(shù)： 22/36頁(yè)
文件大?。?/td> 0K
描述： EVAL SYSTEM FOR MAX9850
產(chǎn)品培訓(xùn)模塊： Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝： 1
系列： *
A master reading data from the MAX9850 transmits the
proper slave address followed by a series of nine SCL
pulses. The MAX9850 transmits data on SDA in sync with
the master-generated SCL pulses. The master acknowl-
edges receipt of each byte of data. Each read sequence
is framed by a START or REPEATED START condition, a
not acknowledge, and a STOP condition.
SDA operates as both an input and an open-drain out-
put. A pullup resistor, typically greater than 500
Ω, is
required on the SDA bus. SCL operates as an input only.
A pullup resistor, typically greater than 500
Ω, is required
on SCL if there are multiple masters on the bus, or if the
master in a single-master system has an open-drain SCL
output. Series resistors in line with SDA and SCL are
optional. Series resistors protect the digital inputs of the
MAX9850 from high-voltage spikes on the bus lines, and
minimize crosstalk and undershoot of the bus signals.
Bit Transfer
One data bit is transferred during each SCL cycle. The
data on SDA must remain stable during the high period
of the SCL pulse. Changes in SDA while SCL is high
are control signals (see the START and STOP
Conditions section). SDA and SCL idle high when the
I2C bus is not busy.
MAX9850
Stereo Audio DAC with DirectDrive
Headphone Amplifier
______________________________________________________________________________________
29
15 14 13 12 11 10 9
8
76543210
15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
RIGHT
LEFT
15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
15 14 13 12 11 10 9
8
76543210
RIGHT
LEFT
LRCLK
SDIN
BCLK
LRCLK
SDIN
BCLK
LEFT-JUSTIFIED
DIGITAL AUDIO REGISTER (0xA)
CONTENTS = 00000000
15
X
141312 1110 9
8
7
6
5
4
3
2
1
0
RIGHT
LEFT
LRCLK
SDIN
BCLK
I2S
DIGITAL AUDIO REGISTER (0xA)
CONTENTS = 00001000
RIGHT-JUSTIFIED
DIGITAL AUDIO REGISTER (0xA)
CONTENTS = 00000100
15
X
14 13 12 11 10 9
8
7
6543210
Figure 4. Right-Justified, and Left-Justified Audio Data Formats (Slave Mode, 16-Bit Data)
SCL
SDA
START
CONDITION
STOP
CONDITION
REPEATED
START
CONDITION
START
CONDITION
tHD, STA
tSP
tBUF
tSU, STO
tLOW
tSU, DAT
tHD, DAT
tHIGH
tR
tF
Figure 5. 2-Wire Interface Timing Diagram
相關(guān)PDF資料
PDF描述
562A011-3/86-0 BOOT MOLDED
0210391020 CABLE JUMPER 1MM .178M 31POS
TCSD-10-D-04.50-01-N-R CABLE STRIPS - SEE NOTES
0982660809 CBL 10POS 0.5MM JMPR TYPE A 1'
VI-J4Z-EX CONVERTER MOD DC/DC 2V 30W
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
CMOD232+ 功能描述:界面開發(fā)工具 Cmod232+ Eval Kit RoHS:否 制造商:Bourns 產(chǎn)品:Evaluation Boards 類型:RS-485 工具用于評(píng)估:ADM3485E 接口類型:RS-485 工作電源電壓:3.3 V
CMOD3003 功能描述:二極管 - 通用，功率，開關(guān) ULTRAMINI SURFACE MOUNT RoHS:否 制造商:STMicroelectronics 產(chǎn)品:Switching Diodes 峰值反向電壓:600 V 正向連續(xù)電流:200 A 最大浪涌電流:800 A 配置: 恢復(fù)時(shí)間:2000 ns 正向電壓下降:1.25 V 最大反向漏泄電流:300 uA 最大功率耗散: 工作溫度范圍: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:ISOTOP 封裝:Tube
CMOD3003 BK 制造商:Central Semiconductor Corp 功能描述:Diode Switching 180V 0.6A Box
CMOD3003 TR 制造商:Central Semiconductor Corp 功能描述:Diodes - General Purpose, Power, Switching ULTRAMINI SURFACE MOUNT
CMOD3003_10 制造商:CENTRAL 制造商全稱:Central Semiconductor Corp 功能描述:SURFACE MOUNT LOW LEAKAGE SILICON SWITCHING DIODE
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*