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參數(shù)資料
| 型號： | CMOD232+ |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 25/36頁 |
| 文件大?。?/td> | 0K |
| 描述： | EVAL SYSTEM FOR MAX9850 |
| 產(chǎn)品培訓(xùn)模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 系列： | * |
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Write Data Format
A write to the MAX9850 includes transmission of a
START condition, the slave address with the R/
W bit set
to 0 (see Table 23), one byte of data to configure the
internal register address pointer, one or more bytes of
data, and a STOP condition. Figure 8 illustrates the
proper frame format for writing one byte of data to the
MAX9850. Figure 9 illustrates the frame format for writ-
ing n-bytes of data to the MAX9850.
The slave address with the R/
W bit set to 0 indicates
that the master intends to write data to the MAX9850.
The MAX9850 acknowledges receipt of the address
byte during the master-generated 9th SCL pulse.
The second byte transmitted from the master config-
ures the MAX9850’s internal register address pointer.
The pointer tells the MAX9850 where to write the next
byte of data. An acknowledge pulse is sent by the
MAX9850 upon receipt of the address pointer data.
The third byte sent to the MAX9850 contains the data
that will be written to the chosen register. An acknowl-
edge pulse from the MAX9850 signals receipt of the
data byte. The address pointer autoincrements to the
next register address after each received data byte.
This autoincrement feature allows a master to write to
sequential registers within one continuous frame.
Figure 9 illustrates how to write to multiple registers with
one frame. The master signals the end of transmission
by issuing a STOP condition.
Register addresses greater than 0xA are reserved. Do
not write to these addresses.
Read Data Format
Send the slave address with the R/
W bit set to 1 to initiate
a read operation. The MAX9850 acknowledges receipt of
its slave address by pulling SDA low during the 9th SCL
clock pulse. A START command followed by a read com-
mand resets the address pointer to register 0x0. The first
byte transmitted from the MAX9850 will be the contents of
register 0x0. Transmitted data is valid on the rising edge
of the master-generated serial clock (SCL). The address
pointer autoincrements after each read data byte. This
autoincrement feature allows all registers to be read
sequentially within one continuous frame.
A STOP condition can be issued after any number of
read data bytes. If a STOP condition is issued followed
by another read operation, the first data byte to be read
will be from register 0x0 and subsequent reads will
autoincrement the address pointer until the next STOP
condition.
MAX9850
Stereo Audio DAC with DirectDrive
Headphone Amplifier
______________________________________________________________________________________
31
ACKNOWLEDGE FROM MAX9850
1 BYTE
AUTOINCREMENT INTERNAL
REGISTER ADDRESS POINTER
ACKNOWLEDGE FROM MAX9850
B1 B0
B3 B2
B5 B4
B7 B6
A
AP
0
ACKNOWLEDGE FROM MAX9850
R/W
SA
SLAVE ADDRESS
REGISTER ADDRESS
Nth DATA BYTE
1 BYTE
AUTOINCREMENT INTERNAL
REGISTER ADDRESS POINTER
ACKNOWLEDGE FROM MAX9850
B1 B0
B3 B2
B5 B4
B7 B6
A
1st DATA BYTE
Figure 9. Writing n-Bytes of Data to the MAX9850
A
0
SLAVE ADDRESS
REGISTER ADDRESS
DATA BYTE
ACKNOWLEDGE FROM MAX9850
R/W
1 BYTE
AUTOINCREMENT INTERNAL
REGISTER ADDRESS POINTER
ACKNOWLEDGE FROM MAX9850
B1
B0
B3
B2
B5
B4
B7
B6
S
A
P
Figure 8. Writing One Byte of Data to the MAX9850
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| CMOD3003 BK | 制造商:Central Semiconductor Corp 功能描述:Diode Switching 180V 0.6A Box |
| CMOD3003 TR | 制造商:Central Semiconductor Corp 功能描述:Diodes - General Purpose, Power, Switching ULTRAMINI SURFACE MOUNT |
| CMOD3003_10 | 制造商:CENTRAL 制造商全稱:Central Semiconductor Corp 功能描述:SURFACE MOUNT LOW LEAKAGE SILICON SWITCHING DIODE |
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