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3.5
The Interrupt Control Unit (ICU31L) receives interrupt re-
quests from internal and external sources and generates in-
terrupts to the CPU. An interrupt is an event that temporarily
stops the normal flow of program execution and causes a
separate interrupt service routine to be executed. After the in-
terrupt is serviced, CPU execution continues with the next in-
struction in the program following the point of interruption.
Interrupts from the timers, USARTs, MICROWIRE/SPI inter-
face, multi-input wake-up, and A/D converter are all
maskable interrupts; they can be enabled or disabled by the
software. There are 32 of these maskable interrupts, orga-
nized into 32 predetermined levels of priority.
The highest-priority interrupt is the Non-Maskable Interrupt
(NMI), which is generated by a signal received on the NMI in-
put pin.
INTERRUPTS
3.6
The Multi-Input Wake-Up (MIWU16) module can be used for
either of two purposes: to provide inputs for waking up (exit-
ing) from the HALT, IDLE, or Power Save mode; or to provide
general-purpose edge-triggered maskable interrupts from
external sources. This 16-channel module generates four
programmable interrupts to the CPU based on the signals re-
ceived on its 16 input channels. Channels can be individually
enabled or disabled, and programmed to respond to positive
or negative edges.
MULTI-INPUT WAKE-UP
3.7
The Dual Clock and Reset (CLK2RES) module generates a
high-speed main system clock from an external crystal net-
work. It also provides the main system reset signal and a
power-on reset function.
This module also generates a slow system clock (32.768
kHz) from another external crystal network. The slow clock is
used for operating the device in power-save mode. Without a
32.768kHz external crystal network, the low speed system
clock can be derived from the high speed clock by a prescal-
er.
Also, two independent clocks divided down from the high
speed clock are available on output pins.
DUAL CLOCK AND RESET
3.8
The Power Management Module (PMM) improves the effi-
ciency of the CR16MCS9/CR16MCS5 and CR16HCS9/
CR16HCS5 by changing the operating mode and therefore
the power consumption according to the required level of ac-
tivity.
The CR16MCS9/CR16MCS5 and CR16HCS9/CR16HCS5
can operate in any of four power modes:
— Active: The CR16MCS9/CR16MCS5 and CR16HCS9/
CR16HCS5 operate at full speed using the high-fre-
quency clock. All devices function are fully operational.
— Power Save: The device operates at reduced speed
using the slow clock. The CPU and some modules can
continue to operate at this low speed.
— IDLE: The device is inactive except for the Power Man-
agement Module and Timing and Watchdog Module,
which continue to operate using the slow clock.
POWER MANAGEMENT
— HALT: The device is inactive but still retains its internal
state (RAM and register contents).
3.9
The Multi-Function Timer (MFT16) module contains two in-
dependent timer/counter units called MFT1 and MFT2, each
containing a pair of 16-bit timer/counter registers. Each timer/
counter unit can be configured to operate in any of the follow-
ing modes:
— Processor-Independent
(PWM) mode, which generates pulses of a specified
width and duty cycle, and which also provides a gener-
al-purpose timer/counter.
— Dual Input Capture mode, which measures the
elapsed time between occurrences of external events,
and which also provides a general-purpose timer/
counter.
— Dual Independent Timer mode, which generates sys-
tem timing signals or counts occurrences of external
events.
— Single Input Capture and Single Timer mode, which
provides one external event counter and one system
timer.
MULTI-FUNCTION TIMER
Pulse
Width
Modulation
3.10
The Versatile Timer Unit (VTU) module contains four inde-
pendent timer subsystems, each operating in either dual 8-bit
PWM configuration, as a single 16-bit PWM timer, or a 16-bit
counter with two input capture channels. Each of the four tim-
er subsystems offer an 8-bit clock prescaler to accommodate
a wide range of frequencies.
VERSATILE TIMER UNIT
3.11
The Timing and Watchdog Module (TWM) generates the
clocks and interrupts used for timing periodic functions in the
system. It also provides Watchdog protection against soft-
ware errors. The module operates on the slow system clock.
The real-time timer can generate a periodic interrupt to the
CPU at a software-programmed interval. This can be used
for real-time functions such as a time-of-day clock. The real-
time timer can trigger a wake-up condition from power-save
mode via the Multi-Input Wake-Up module.
The Watchdog is designed to detect program execution er-
rors such as an infinite loop or a “runaway” program. Once
Watchdog operation is initiated, the application program
must periodically write a specific value to a Watchdog regis-
ter, within specific time intervals. If the software fails to do so,
a Watchdog error is triggered, which resets the device.
REAL-TIME TIMER AND WATCHDOG
3.12
The USART supports a wide range of programmable baud
rates and data formats, and handles parity generation and
several error detection schemes. The baud rate is generated
on-chip, under software control.
There are two independent USARTs in the device and they
offer a wake-up condition from the power-save mode via the
Multi-Input Wake-Up module.
USART
3.13
The MICROWIRE/SPI (MWSPI) interface module supports
synchronous serial communications with other devices that
MICROWIRE/SPI