參數(shù)資料
型號： CS4202-JQZR
廠商： Cirrus Logic Inc
文件頁數(shù)： 36/66頁
文件大?。?/td> 0K
描述： IC CODEC AUDIO '97 48-TQFP
標(biāo)準(zhǔn)包裝： 2,000
類型： 音頻編解碼器 '97
數(shù)據(jù)接口： 串行
分辨率（位）： 24 b
ADC / DAC 數(shù)量： 1 / 1
三角積分調(diào)變： 是
動態(tài)范圍，標(biāo)準(zhǔn) ADC / DAC (db)： 90 / 90
電壓 - 電源，模擬： 4.75 V ~ 5.25 V
電壓 - 電源，數(shù)字： 4.75 V ~ 5.25 V
工作溫度： 0°C ~ 70°C
安裝類型： 表面貼裝
封裝/外殼： 48-LQFP
供應(yīng)商設(shè)備封裝： 48-TQFP（9x9）
包裝： 帶卷 (TR)
Micrel, Inc.
MIC3001
August 2004
41
M9999-082404-A
hbwhelp@micrel.com or (408) 955-1690
TX Optical Power High Alarm MSB (TXMAXh)
D[7]
read/write
D[6]
read/write
D[5]
read/write
D[4]
read/write
D[3]
read/write
D[2]
read/write
D[1]
read/write
D[0]
read/write
Default Value
0000 0000b = 00h (0mW)
Serial Address
A2h = 1010001b
Byte Address
24 = 18h
Each LSB represents 25.6
W. This register is to be used in conjunction with TXOPl to yield a sixteen-bit value. The values in
TXOPh:TXOPl are in an unsigned binary format. The value in this register is uncalibrated. The value in TXMAXh is compared
against TXOPh. Alarm bit Ax is set if TXOPh > TXMAXh.
TX Optical Power High Alarm LSB (TXMAXl)
D[7]
read/write
D[6]
read/write
D[5]
read/write
D[4]
read/write
D[3]
read/write
D[2]
read/write
D[1]
read/write
D[0]
read/write
Default Value
0000 0000b = 00h (0mW)
Serial Address
A2h = 1010001b
Byte Address
25 = 19h
Each LSB represents 0.1
W. This register is to be used in conjunction with TXMAXh to yield a sixteen-bit value. The values in
TXOPh:TXOPl are in an unsigned binary format. The value in this register is uncalibrated. The value in TXMAXh is compared
against TXOPh. Alarm bit Ax is set if TXOPh > TXMAXh. Since TXOPl is always zero, it is recommended that this register
always be programmed to zero. This register is provided for compliance with SFF-8472. It is not used by the MIC3001 when
doing threshold comparisons and setting alarm or warning bits.
TX Optical Power Low Alarm MSB (TXMINh)
D[7]
read/write
D[6]
read/write
D[5]
read/write
D[4]
read/write
D[3]
read/write
D[2]
read/write
D[1]
read/write
D[0]
read/write
Default Value
0000 0000b = 00h (0mW)
Serial Address
A2h = 1010001b
Byte Address
26 = 1Ah
Each LSB represents 25.6
W. This register is to be used in conjunction with TXMINl to yield a sixteen-bit value. The values in
TXMINh:TMINl are in an unsigned binary format. The value in this register is uncalibrated. The value in TXMINh is compared
against TXOPh. Alarm bit Ax is set if TXOPh < TXMINh.
TX Optical Power Low Alarm LSB (TXMINl)
D[7]
read/write
D[6]
read/write
D[5]
read/write
D[4]
read/write
D[3]
read/write
D[2]
read/write
D[1]
read/write
D[0]
read/write
Default Value
0000 0000b = 00h (0mW)
Serial Address
A2h = 1010001b
Byte Address
27 = 1Bh
Each LSB represents 0.1
W. This register is to be used in conjunction with TXMINh to yield a sixteen-bit value. The values in
TXOPh:TXOPl are in an unsigned binary format. The value in this register is uncalibrated. The value in TXMINh is compared
against TXOPh. Alarm bit Ax is set if TXOPh < TXMINh. Since TXOPl is always zero, it is recommended that this register
always be programmed to zero. This register is provided for compliance with SFF-8472. It is not used by the MIC3001 when
doing threshold comparisons and setting alarm or warning bits.
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