參數資料
| 型號： | CS4202-JQZR |
| 廠商： | Cirrus Logic Inc |
| 文件頁數： | 61/66頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC CODEC AUDIO '97 48-TQFP |
| 標準包裝： | 2,000 |
| 類型： | 音頻編解碼器 '97 |
| 數據接口： | 串行 |
| 分辨率（位）： | 24 b |
| ADC / DAC 數量： | 1 / 1 |
| 三角積分調變： | 是 |
| 動態(tài)范圍，標準 ADC / DAC (db)： | 90 / 90 |
| 電壓 - 電源，模擬： | 4.75 V ~ 5.25 V |
| 電壓 - 電源，數字： | 4.75 V ~ 5.25 V |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 48-LQFP |
| 供應商設備封裝： | 48-TQFP（9x9） |
| 包裝： | 帶卷 (TR) |
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Micrel, Inc.
MIC3001
August 2004
64
M9999-082404-A
hbwhelp@micrel.com or (408) 955-1690
Bit
Function
Operation
D[7]
LUTSEL
RX power look-up table input
selection bit
1 = RX power;
0 = temperature; read/write; ignored if INTCAL = 0.
D[6]
TXFPOL
TXFIN active polarity select; a fault
is indicated when TXFIN = TXFPOL
0 = active-low;
1 = active-high; read/write; ignored if TXFIN = 0.
D[5]
GPOD
GPO output drive
0 = open drain;
1 = push-pull; read/write; ignored if GPOM = 0.
D[4]
GPOM
GPO/RSOUT mode select
0 = RSOUT; 1 = GPO; read/write.
D[3]
GPOC
GPO output control
0 = low; 1 = high; read/write; ignored if GPOM = 0.
D[2]
TXFIN
TXFIN mode select
0 = SHDN; 1 = TXFIN; read/write.
D[1]
LOSDIS
RXLOS comparator disable
0 = enabled; 1 = disabled; read/write.
D[0]
INTCAL
Calibration mode select
0 = external calibration;
1 = internal calibration; read/write.
BIAS DAC Setting (APCDAC)
Current VBIAS Setting
D[7]
read only
D[6]
read only
D[5]
read only
D[4]
read only
D[3]
read only
D[2]
read only
D[1]
read only
D[0]
read only
Default Value
0000 0000b = 00h
Serial Address
A6h = 1010011b
Byte Address
20 = 14h
This register reflects (reads back) the value set in the APC register (APCSET0, APCSET1, or APCSET2 whichever is selected).
A valid OEM password is required for access to this register.
Modulation DAC Setting (MODDAC)
Current VMOD Setting
D[7]
read only
D[6]
read only
D[5]
read only
D[4]
read only
D[3]
read only
D[2]
read only
D[1]
read only
D[0]
read only
Default Value
0000 0000b = 00h
Serial Address
A6h = 1010011b
Byte Address
21 = 15h
This register reflects (reads back) the value set in the MODSET register. A valid OEM password is required for access to this
register.
OEM Readback Register (OEMRD)
D[7]
reserved
D[6]
reserved
D[5]
reserved
D[4]
INT
read only
D[3]
APCSAT
read only
D[2]
IBFLT
read only
D[1]
TXFLT
read only
D[0]
RSOUT
read only
Default Value
0000 0000b = 00h
Serial Address
A6h = 1010011b
Byte Address
22 = 16h
This register reflects (reads back) the status of the bits corresponding to the parameters defined below. A valid OEM password
is required for access to this register. Otherwise, reads are undefined and writes are ignored.
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