參數(shù)資料
型號： CS4202-JQZR
廠商： Cirrus Logic Inc
文件頁數(shù)： 58/66頁
文件大?。?/td> 0K
描述： IC CODEC AUDIO '97 48-TQFP
標準包裝： 2,000
類型： 音頻編解碼器 '97
數(shù)據(jù)接口： 串行
分辨率（位）： 24 b
ADC / DAC 數(shù)量： 1 / 1
三角積分調(diào)變： 是
動態(tài)范圍，標準 ADC / DAC (db)： 90 / 90
電壓 - 電源，模擬： 4.75 V ~ 5.25 V
電壓 - 電源，數(shù)字： 4.75 V ~ 5.25 V
工作溫度： 0°C ~ 70°C
安裝類型： 表面貼裝
封裝/外殼： 48-LQFP
供應商設備封裝： 48-TQFP（9x9）
包裝： 帶卷 (TR)
Micrel, Inc.
MIC3001
August 2004
61
M9999-082404-A
hbwhelp@micrel.com or (408) 955-1690
Fault Suppression Timer (FLTTMR)
Fault suppression interval in increments of 0.5ms
D[7]
read/write
D[6]
read/write
D[5]
read/write
D[4]
read/write
D[3]
read/write
D[2]
read/write
D[1]
read/write
D[0]
read/write
Default Value
0000 0000b = 00h
Serial Address
A6h = 1010011b
Byte Address
10 = 0Ah
Saturation faults are suppressed for a time, tFLTTMR, following laser turn-on. This avoids nuisance tripping while the APC loop
starts up. The length of this interval is (FLTTMR
∞0.5ms), typical. A value of zero will result in no fault suppression. A valid OEM
password is required for access to this register. This register is non-volatile and will be maintained through power and reset
cycles.
Fault Mask (FLTMSK)
D[7]
OEMIM
read/write
D[6]
POHE
read/write
D[5]
reserved
D[4]
reserved
D[3]
SATMSK
read/write
D[2]
TXMSK
read/write
D[1]
IAMSK
read/write
D[0]
DFMSK
read/write
Default Value
0000 0000b = 00h
Serial Address
A6h = 1010011b
Byte Address
11 = 0Bh
A valid OEM password is required for access to this register. This register is non-volatile and will be maintained through power
and reset cycles.
Bit
Function
Operation
D[7]
OEMIM
OEM interrupt mask bit
1 = masked; 0 = enabled; Read/write; non-volatile.
D[6]
POHE
OEM Power-on Hour Meter enable bit
1 = enabled; 0 = disabled; Read/write; non-volatile.
D[5:4]
Reserved
Always write as zero; reads undefined.
D[3]
SATMSK
APC saturation fault mask bit
1 = masked; 0 = enabled; Read/write; non-volatile.
D[2]
TXMSK
High TX optical power fault mask bit
1 = masked; 0 = enabled; Read/write; non-volatile.
D[1]
IAMSK
Bias current high alarm mask bit
1 = masked; 0 = enabled; Read/write; non-volatile.
D[0]
DFMSK
Diode fault mask bit
1 = masked; 0 = enabled; Read/write; non-volatile.
OEM Password Setting (OEMPWSET)
D[7]
read/write
D[6]
read/write
D[5]
read/write
D[4]
read/write
D[3]
read/write
D[2]
read/write
D[1]
read/write
D[0]
read/write
Default Value
0000 0000b = 00h
Serial Address
A6h = 1010011b
Byte Address
12 - 15 = 0Fh - 0Fh; 0Ch = MSB
This four-byte field is the password required for access to the OEM area of the MIC3001’s memory and registers. The byte at
address 250 (FAh) is the most significant byte. This field is compared to the four-byte OEMPW field at serial address A2h, byte
120 to 123. If the two fields match, access is allowed to the OEM areas of the MIC3001 non-volatile memory at serial addresses
A4h and A6h. The OEM password may be set by writing the new value into OEMPWSET. The new password will not take effect
until after a power-on reset occurs or a warm reset is performed using the RST bit in OEMCFG0. This allows the new password
to be verified before it takes effect. These registers are non-volatile and will be maintained through power and reset cycles. A
valid OEM password is required for access to this register.
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