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參數(shù)資料
| 型號： | CS4207-CNZ |
| 廠商： | Cirrus Logic Inc |
| 文件頁數(shù)： | 37/77頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC CODEC AUD HDPN AMP COMM 48QFN |
| 標準包裝： | 429 |
| 類型： | 音頻編解碼器 |
| 數(shù)據(jù)接口： | 串行 |
| 分辨率（位）： | 24 b |
| ADC / DAC 數(shù)量： | 2 / 3 |
| 三角積分調(diào)變： | 是 |
| 動態(tài)范圍，標準 ADC / DAC (db)： | 105 / 110 |
| 電壓 - 電源，模擬： | 2.97 V ~ 5.25 V |
| 電壓 - 電源，數(shù)字： | 2.97 V ~ 5.25 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 48-QFN |
| 供應(yīng)商設(shè)備封裝： | 48-QFN-EP（6x6） |
| 包裝： | 托盤 |
| 其它名稱： | 598-1796 |
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42
DS880F4
CS4207
state for the Audio Function Group node will force all other nodes with power state control to the D3 state.
If the Power State field for this node is set to D0, then the individual power state for each converter will be
uniquely controlled via the corresponding node Power State field.
PS-Act is a Power State field which indicates the actual power state of the referenced node. Within the
Audio Function Group node, this field will always be equal to the PS-Set field (modulo the time required
to execute a power state transition).
PS-ClkStopOk is reported as a ‘1’b when the codec is capable of continuing proper operation in the ab-
sence of the HD Audio Bus BITCLK. This bit is reported only at the Audio Function Group level and is
reserved at the widget level. After accepting a low power state transition request (D3 state) to the Audio
Function Group Node, the codec will begin ramping down all the audio converters. During this time, the
PS-ClkStopOK bit will be set to ‘0’b to signify that the bus BITCLK can not be stopped. Once all the con-
verters have been ramped down, the codec will update the PS-Act bits to reflect the actual transition to
the D3 state and will then set the PS-ClkStopOk bit to a ‘1’b to report the ability of the codec to operate
correctly while in the low power state with the BITCLK stopped. While in the low power D3 state, and with
the bus BITCLK stopped, the pin widgets of the codec which were enabled to support unsolicited respons-
es will continue to operate.
6.3.9
GPIO Data
Get Parameter Command Format:
Set Parameter Command Format:
Response Format:
Bits [31:28]
Bits [27:20]
Bits [19:8]
Bits [7:0]
CAd = X
Node ID = 01h
Verb ID = F15h
Payload = 00h
Bits [31:28]
Bits [27:20]
Bits [19:8]
Bits [7:0]
CAd = X
Node ID = 01h
Verb ID = 715h
Payload = xxh
Bits
Type
Default
Description
31:8
Read Only
000000h
Reserved
7:4
Read Only
0h
GPIO[7:4] Data: Not Supported.
3:0
Read/Write
0h
GPIO[3:0] Data: For GPIO programmed as
inputs, this value is read only and is the sensed
value on the corresponding pin. For GPIO pro-
grammed as outputs, the value written is driven
onto the corresponding pin.
Note that if the corresponding bit in the GPIO
Enable Mask control is not set, pins configured
as outputs will not drive the associated bit value
(as the pin must be in a Hi-Z state), but the value
returned on a read will still reflect the value that
would be driven if the pin were to be enabled in
the GPIO Enable Mask control.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CS4207-CNZ/C1 | 制造商:CIRRUS 制造商全稱:Cirrus Logic 功能描述:Low-power, 4-in / 6-out HD Audio CODEC with Headphone Amp |
| CS4207-CNZR | 功能描述:接口—CODEC IC Lo Pwr,4/6 HD Aud Codec w/HP Amp RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉(zhuǎn)換速率:48 kSPs 接口類型:I2C ADC 數(shù)量:2 DAC 數(shù)量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel |
| CS4207-CNZR/C1 | 制造商:CIRRUS 制造商全稱:Cirrus Logic 功能描述:Low-power, 4-in / 6-out HD Audio CODEC with Headphone Amp |
| CS4207-DNZ | 功能描述:接口—CODEC IC Lo Pwr,4/6 HD Aud Codec w/HP Amp RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉(zhuǎn)換速率:48 kSPs 接口類型:I2C ADC 數(shù)量:2 DAC 數(shù)量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel |
| CS4207-DNZR | 功能描述:接口—CODEC IC Lo Pwr,4/6 HD Aud Codec w/HP Amp RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉(zhuǎn)換速率:48 kSPs 接口類型:I2C ADC 數(shù)量:2 DAC 數(shù)量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel |
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