參數(shù)資料
型號(hào)： CXK77B3640AGB
廠商： Sony Corporation
英文描述： 4Mb Late Write HSTL High Speed Synchronous SRAM(128K x 36Bit)(4M位、寫(xiě)延遲、高速邏輯收發(fā)（HSTL）、高速同步靜態(tài)RAM (128K x 36位))
中文描述： 4Mb的后寫(xiě)入HSTL高速同步SRAM（128K的x 36Bit）（4分位，寫(xiě)延遲，高速邏輯收發(fā)（HSTL），高速同步靜態(tài)隨機(jī)存儲(chǔ)器（128K的× 36位））
文件頁(yè)數(shù)： 1/33頁(yè)
文件大小： 284K
代理商： CXK77B3640AGB
4Mb, Sync LW, HSTL, rev 1.5
1 / 33
July 23, 1998
CXK77B3640AGB / CXK77B1840AGB
SONY
37/38/4/45
4Mb Late Write HSTL High Speed Synchronous SRAMs (128K x 36 or 256K x 18 Organization)
Preliminary
Description
Features
R-R Mode
t
KHKH
/ t
KHQV
------------------
3.45ns / 2.25ns
3.8ns / 2.25ns
3.8ns / 2.25ns
5.0ns / 2.50ns
R-L, R-FT Modes
t
KHKH
/ t
KHQV
------------------
4.8ns / 4.6ns
4.8ns / 4.8ns
5.2ns / 5.2ns
6.0ns / 6.0ns
**DC Mode**
t
KHKH
/ t
KHQV
------------------
3.7ns / 4.9ns
3.8ns / 4.9ns
4.0ns / 5.2ns
4.5ns / 6.0ns
Fast Cycle / Access Time
---------------------------------
-37
-38
-4
-45
Note: Contact Sony Memory Marketing for availability of DC mode functionality in CXK77B1840A.
Single 3.3V power supply (V
DD
): 3.3V
±
5%
Register - Register (R-R), Register - Latch (R-L), Register - Flow Thru (R-FT), or Dual Clock (DC) read operations
Read operation protocol selectable via dedicated mode pins (M1, M2)
Fully coherent, late write, self-timed write operations
Byte Write capability
Differential input clocks (K/K, C/C)
Asynchronous output enable (G)
Dedicated output supply voltage (V
DDQ
): 1.5V typical, 2.0V maximum
HSTL-compatible I/O interface with dedicated input reference voltage (V
REF
): 0.75V typical
Programmable impedance output drivers
Sleep (power down) mode via dedicated mode pin (ZZ)
JTAG boundary scan (subset of IEEE standard 1149.1)
119 pin (7x17), 1.27mm pitch, 14mm x 22mm Plastic Ball Grid Array (PBGA) package
The CXK77B3640A (organized as 131,072 words by 36 bits) and the CXK77B1840A (organized as 262,144 words by 18 bits)
are high speed BiCMOS synchronous static RAMs with common I/O pins. These synchronous SRAMs integrate input registers,
high speed RAM, output registers/latches, and a one-deep write buffer onto a single monolithic IC. Four distinct read operation
protocols, Register - Register (R-R), Register - Latch (R-L), Register - Flow Thru (R-FT), and Dual Clock (DC), and one write
operation protocol, Late Write (LW), are supported, providing a flexible, high-performance user interface.
All address, data, and control input signals except G (Output Enable) and ZZ (Sleep Mode) are registered on the positive edge
of K clock. Read operation protocol is selectable through external mode pins M1 and M2.
Write operations are internally self-timed, eliminating the need for complex off-chip write pulse generation. In Register - Latch
and Register - Flow Thru modes, when SW (Global Write Enable) is driven active, the subsequent positive edge of K clock tri-
states the SRAM’s output drivers immediately, allowing Read-Write-Read operations to be initiated consecutively, with no dead
cycles between them.
The output drivers are series terminated, and the output impedance is programmable through an external impedance matching
resistor RQ. By connecting RQ between ZQ and V
SS
, the output impedance of all DQ pins can be precisely controlled.
Sleep (power down) mode control is provided through the asynchronous ZZ input. 270 MHz operation is obtained from a single
3.3V power supply. JTAG boundary scan interface is provided using a subset of IEEE standard 1149.1 protocol.
相關(guān)PDF資料
PDF描述
CXK77B1840AGB 4Mb Late Write HSTL High Speed Synchronous SRAM(256K x 18Bit)(4M位、寫(xiě)延遲、高速邏輯收發(fā)（HSTL）、高速同步靜態(tài)RAM (256K x 18位))
CXK77B3641GB 4Mb Late Write LVTTL High Speed Synchronous SRAM (128K x 36Bit)(4M位、寫(xiě)延遲、LVTTL高速同步靜態(tài)RAM (128K x 36位))
CXK77V3211Q-12 Hook-Up Wire; Conductor Size AWG:24; No. Strands x Strand Size:7 x 32; Jacket Color:White/Red; Cable/Wire MIL SPEC:MIL-W-16878/1 Type B; Conductor Material:Copper; Jacket Material:Polyvinylchloride (PVC) RoHS Compliant: Yes
CXK77V3211Q-14 Hook-Up Wire; Conductor Size AWG:24; No. Strands x Strand Size:7 x 32; Jacket Color:White/Red; Cable/Wire MIL SPEC:MIL-W-16878/1 Type B; Conductor Material:Copper; Conductor Plating:Tin; Jacket Material:Polyvinylchloride (PVC) RoHS Compliant: Yes
CXK77V3211Q 32768-word by 32-bit High Speed Synchronous Static RAM(32768字 × 32位高速同步靜態(tài)RAM)
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
CXK77B3640GB-45 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x36 Fast Synchronous SRAM
CXK77B3640GB-4A 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x36 Fast Synchronous SRAM
CXK77B3641GB-5 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x36 Fast Synchronous SRAM
CXK77B3641GB-6 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x36 Fast Synchronous SRAM
CXK77K18R320GB 制造商:SONY 制造商全稱:Sony Corporation 功能描述:32Mb LW R-R HSTL High Speed Synchronous SRAM (2Mb x 18)
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