參數(shù)資料
型號： DAC757IDGSR
廠商： Texas Instruments, Inc.
英文描述： QUAD, 12-BIT, LOW-POWER, VOLTAGE OUTPUT, I2C INTERFACE DIGITAL-TO-ANALOG CONVERTER
中文描述： 四，12位，低功耗，電壓輸出，I2C接口的數(shù)字模擬轉(zhuǎn)換器
文件頁數(shù)： 15/31頁
文件大?。?/td> 783K
代理商： DAC757IDGSR
www.ti.com
DAC7574
SLAS375–JUNE 2003
Broadcast Address Byte
MSB
LSB
1
0
0
1
0
0
0
0
Broadcast addressing is also supported by DAC7574. Broadcast addressing can be used for synchronously
updating or powering down multiple DAC7574 devices. DAC7574 is designed to work with other members of the
DAC857x and DAC757x families to support multichannel synchronous update. Using the broadcast address,
DAC7574 responds regardless of the states of the address pins. Broadcast is supported only in write mode
(Master writes to DAC7574).
Control Byte
MSB
LSB
0
0
L1
L0
X
Sel1
Sel0
PD0
Table 1. Control Register Bit Descriptions
Bit Name
Bit Number/Description
L1
Load1 (Mode Select) Bit
Are used for selecting the update mode.
L2
Load0 (Mode Select) Bit
00
Store I
2
C data. The contents of MS-BYTE and LS-BYTE (or power down information) are stored in the
temporary register of a selected channel. This mode does not change the DAC output of the selected
channel.
Update selected DAC with I
2
C data. Most commonly utilized mode. The contents of MS-BYTE and
LS-BYTE (or power down information) are stored in the temporary register and in the DAC register of
the selected channel. This mode changes the DAC output of the selected channel with the new data.
01
10
4-Channel synchronous update. The contents of MS-BYTE and LS-BYTE (or power down information)
are stored in the temporary register and in the DAC register of the selected channel. Simultaneously,
the other three channels get updated with previously stored data from the temporary register. This
mode updates all four channels together.
11
Broadcast update mode. This mode has two functions. In broadcast mode, DAC7574 responds
regardless of local address matching, and channel selection becomes irrelevant as all channels update.
This mode is intended to enable up to 16 channels simultaneous update, if used with the I
C broadcast
address (1001 0000).
If Sel1=0
All four channels are updated with the contents of their temporary register
data.
If Sel1=1
All four channels are updated with the MS-BYTE and LS-BYTE data or
powerdown.
Sel1
Buff Sel1 Bit
Channel Select Bits
Sel0
Buff Sel0 Bit
00
Channel A
01
Channel B
10
Channel C
11
Channel D
PD0
Power Down Flag
0
Normal operation
1
Power-down flag (MSB7 and MSB6 indicate a power-down operation, as shown in Table 2).
15
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