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參數(shù)資料
| 型號： | DC1561A |
| 廠商： | Linear Technology |
| 文件頁數(shù)： | 13/42頁 |
| 文件大?。?/td> | 0K |
| 描述： | EVAL BOARD FOR LTC4278 |
| 設(shè)計(jì)資源： | DC1561A Design Files |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 主要目的： | 電源管理，以太網(wǎng)供電（POE） |
| 嵌入式： | 否 |
| 已用 IC / 零件： | LTC4278 |
| 已供物品： | 板 |
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LTC4278
20
4278fc
Classification Resistor (RCLASS)
The RCLASS resistor sets the classification load current,
corresponding to the PD power classification. Select the
value of RCLASS from Table 2 and connect the resistor
between the RCLASS and VPORTN pins as shown in Figure
4, or float the RCLASS pin if the classification load cur-
rent is not required. The resistor tolerance must be 1%
or better to avoid degrading the overall accuracy of the
classification circuit.
Load Capacitor
The IEEE 802.3af/at specification requires that the PD
maintains a minimum load capacitance of 5μF and does
not specify a maximum load capacitor. However, if the
load capacitor is too large, there may be a problem with
inadvertent power shutdown by the PSE.
This occurs when the PSE voltage drops quickly. The input
diode bridge reverses bias, and the PD load momentarily
powers off the load capacitor. If the PD does not draw
power within the PSE’s 300ms disconnection delay, the
PSE may remove power from the PD. Thus, it is necessary
to evaluate the load current and capacitance to ensure that
an inadvertent shutdown cannot occur.
The load capacitor can store significant energy when fully
charged. The PD design must ensure that this energy is
not inadvertently dissipated in the LTC4278. For example,
if the VPORTP pin shorts to VPORTN while the capacitor
is charged, current will flow through the parasitic body
diode of the internal MOSFET and may cause permanent
damage to the LTC4278.
T2P Interface
When a 2-event classification sequence successfully
completes, the LTC4278 recognizes this sequence, and
provides an indicator bit, declaring the presence of a
Type 2 PSE. The open-drain output provides the option
to use this signal to communicate to the LTC4278 load,
or to leave the pin unconnected.
Figure 8 shows two interface options using the T2P pin
and the opto-isolator. The T2P pin is active low and con-
nects to an opto-isolator to communicate across the DC/
DC converter isolation barrier. The pull-up resistor RP is
sized according to the requirements of the opto-isolator
operating current, the pull-down capability of the T2P pin,
and the choice of V+. V+ for example can come from the
PoE supply rail (which the LTC4278 VPORTP is tied to), or
from the voltage source that supplies power to the DC/
DC converter. Option 1 has the advantage of not drawing
power unless T2P is declared active.
Shutdown Interface
To corrupt the signature resistance, the SHDN pin can be
driven high with respect to VPORTN. If unused, connect
SHDN directly to VPORTN.
Auxiliary Power Source
In some applications, it is desirable to power the PD from
an auxiliary power source such as a wall adapter.
Auxiliary power can be injected into an LTC4278-based
PD at the input of the LTC4278 VPORTN, at VNEG, or even
the power supply output. In addition, some PD applications
maydesireauxiliarysupplydominanceormaybeconfigured
APPLICATIONS INFORMATION
4278 F08
OPTION 1: SERIES CONFIGURATION FOR ACTIVE LOW/LOW IMPEDANCE OUTPUT
–54V
TO
PSE
RP
TO PD LOAD
VPORTP
LTC4278
VPORTN
T2P
V+
OPTION 2: SHUNT CONFIGURATION FOR ACTIVE HIGH/OPEN COLLECTOR OUTPUT
–54V
TO
PSE
RP
TO PD LOAD
VPORTP
LTC4278
VPORTN
VNEG
T2P
V+
Figure 8. T2P Interface Examples
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| DC1561W | 制造商:Aleph America Corporation 功能描述: |
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