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| 型號： | DC1561A |
| 廠商： | Linear Technology |
| 文件頁數(shù)： | 17/42頁 |
| 文件大?。?/td> | 0K |
| 描述： | EVAL BOARD FOR LTC4278 |
| 設(shè)計(jì)資源： | DC1561A Design Files |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 主要目的： | 電源管理，以太網(wǎng)供電（POE） |
| 嵌入式： | 否 |
| 已用 IC / 零件： | LTC4278 |
| 已供物品： | 板 |
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LTC4278
24
4278fc
to transformer leakage inductance. The latter causes a
voltage spike on the primary side, not directly related to
output voltage. Some time is also required for internal
settling of the feedback amplifier circuitry. In order to
maintain immunity to these phenomena, a fixed delay is
introduced between the switch turn-off command and the
enabling of the feedback amplifier. This is termed “enable
delay.” In certain cases where the leakage spike is not
sufficiently settled by the end of the enable delay period,
regulation error may result. See the subsequent sections
for further details.
Collapse Detect
Once the feedback amplifier is enabled, some mechanism
is then required to disable it. This is accomplished by a
collapse detect comparator, which compares the flyback
voltage (FB) to a fixed reference, nominally 80% of VFB.
When the flyback waveform drops below this level, the
feedback amplifier is disabled.
Minimum Enable Time
The feedback amplifier, once enabled, stays on for a fixed
minimum time period, termed “minimum enable time.”
This prevents lockup, especially when the output voltage
is abnormally low, e.g., during start-up. The minimum
enable time period ensures that the VCMP node is able to
“pump up” and increase the current mode trip point to
the level where the collapse detect system exhibits proper
operation. This time is set internally.
Effects of Variable Enable Period
The feedback amplifier is enabled during only a portion of
thecycletime.Thiscanvaryfromthefixedminimumenable
time described to a maximum of roughly the off switch
time minus the enable delay time. Certain parameters of
feedback amp behavior are directly affected by the variable
enable period. These include effective transconductance
and VCMP node slew rate.
Load Compensation Theory
The LTC4278 uses the flyback pulse to obtain information
about the isolated output voltage. An error source is
caused by transformer secondary current flow through
the synchronous MOSFET RDS(ON) and real life nonzero
impedances of the transformer secondary and output
capacitor. This was represented previously by the
expression, ISEC(ESR+RDS(ON)).However,itisgenerally
more useful to convert this expression to effective output
impedance. Because the secondary current only flows
during the off portion of the duty cycle (DC), the effective
outputimpedanceequalsthelumpedsecondaryimpedance
divided by off time DC.
Since the off-time duty cycle is equal to 1 – DC, then:
RS(OUT) =
ESR
+RDS(ON)
1– DC
where:
RS(OUT) = effective supply output impedance
DC = duty cycle
RDS(ON) and ESR are as defined previously
This impedance error may be judged acceptable in less
critical applications, or if the output load current remains
relativelyconstant.Inthesecases,theexternalFBresistive
divider is adjusted to compensate for nominal expected
error. In more demanding applications, output impedance
error is minimized by the use of the load compensation
function. Figure 11 shows the block diagram of the load
compensation function. Switch current is converted to a
voltagebytheexternalsenseresistor,averagedandlowpass
filtered by the internal 50k resistor RCMPF and the external
capacitor on CCMP. This voltage is impressed across the
external RCMP resistor by op amp A1 and transistor Q3
producingacurrentatthecollectorofQ3thatissubtracted
from the FB node. This effectively increases the voltage
requiredatthetopoftheR1/R2feedbackdividertoachieve
equilibrium.
The average primary-side switch current increases to
maintain output voltage regulation as output loading
increases. The increase in average current increases RCMP
resistor current which affects a corresponding increase
in sensed output voltage, compensating for the IR drops.
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| DC1561B | 功能描述:EVAL BOARD FOR LTC4278 RoHS:是 類別:編程器，開發(fā)系統(tǒng) >> 評估演示板和套件 系列:- 標(biāo)準(zhǔn)包裝:1 系列:- 主要目的:數(shù)字電位器 嵌入式:- 已用 IC / 零件:AD5258 主要屬性:- 次要屬性:- 已供物品:板 相關(guān)產(chǎn)品:AD5258BRMZ1-ND - IC POT DGTL I2C1K 64P 10MSOPAD5258BRMZ10-ND - IC POT DGTL I2C 10K 64P 10MSOPAD5258BRMZ100-ND - IC POT DGTL I2C 100K 64P 10MSOPAD5258BRMZ50-ND - IC POT DGTL I2C 50K 64P 10MSOPAD5258BRMZ1-R7-ND - IC POT DGTL I2C 1K 64P 10MSOPAD5258BRMZ10-R7-ND - IC POT DGTL I2C 10K 64P 10MSOPAD5258BRMZ50-R7-ND - IC POT DGTL I2C 50K 64P 10MSOPAD5258BRMZ100-R7-ND - IC POT DGTL I2C 100K 64P 10MSOP |
| DC1561W | 制造商:Aleph America Corporation 功能描述: |
| DC1561W-COM | 制造商:Aleph America Corporation 功能描述: |
| DC1562A-A | 功能描述:BOARD EVAL LTC6990 RoHS:是 類別:編程器，開發(fā)系統(tǒng) >> 評估演示板和套件 系列:TimerBlox® 標(biāo)準(zhǔn)包裝:1 系列:- 主要目的:電信，線路接口單元（LIU） 嵌入式:- 已用 IC / 零件:IDT82V2081 主要屬性:T1/J1/E1 LIU 次要屬性:- 已供物品:板，電源，線纜，CD 其它名稱:82EBV2081 |
| DC1562A-B | 功能描述:BOARD EVAL LTC6991 RoHS:是 類別:編程器，開發(fā)系統(tǒng) >> 評估演示板和套件 系列:TimerBlox® 標(biāo)準(zhǔn)包裝:1 系列:- 主要目的:電信，線路接口單元（LIU） 嵌入式:- 已用 IC / 零件:IDT82V2081 主要屬性:T1/J1/E1 LIU 次要屬性:- 已供物品:板，電源，線纜，CD 其它名稱:82EBV2081 |
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